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UPD703213YA2 参数 Datasheet PDF下载

UPD703213YA2图片预览
型号: UPD703213YA2
PDF下载: 下载PDF文件 查看货源
内容描述: 32位单芯片微控制器产品 [32-Bit Single-Chip Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 861 页 / 4423 K
品牌: NEC [ NEC ]
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4.3.9  
Port CS ........................................................................................................................................ 125  
4.3.10 Port CT ........................................................................................................................................ 127  
4.3.11 Port DH........................................................................................................................................ 129  
4.3.12 Port DL......................................................................................................................................... 131  
Block Diagrams ........................................................................................................................ 134  
Port Register Setting When Alternate Function Is Used...................................................... 160  
Cautions.................................................................................................................................... 166  
4.4  
4.5  
4.6  
4.6.1  
4.6.2  
Cautions on bit manipulation instruction for port n register (Pn) .................................................. 166  
Hysteresis characteristics ............................................................................................................ 167  
CHAPTER 5 BUS CONTROL FUNCTION.......................................................................................... 168  
5.1  
5.2  
Features .................................................................................................................................... 168  
Bus Control Pins ...................................................................................................................... 169  
5.2.1  
5.2.2  
Pin status when internal ROM, internal RAM, or on-chip peripheral I/O is accessed................... 170  
Pin status in each operation mode............................................................................................... 170  
5.3  
Memory Block Function........................................................................................................... 171  
5.3.1  
Chip select control function.......................................................................................................... 172  
5.4  
5.5  
External Bus Interface Mode Control Function..................................................................... 172  
Bus Access............................................................................................................................... 173  
5.5.1  
5.5.2  
5.5.3  
Number of clocks for access........................................................................................................ 173  
Bus size setting function .............................................................................................................. 173  
Access by bus size ...................................................................................................................... 174  
5.6  
Wait Function............................................................................................................................ 181  
5.6.1  
5.6.2  
5.6.3  
5.6.4  
Programmable wait function ........................................................................................................ 181  
External wait function................................................................................................................... 182  
Relationship between programmable wait and external wait ....................................................... 183  
Programmable address wait function........................................................................................... 184  
5.7  
5.8  
Idle State Insertion Function................................................................................................... 185  
Bus Hold Function ................................................................................................................... 186  
5.8.1  
5.8.2  
5.8.3  
Functional outline......................................................................................................................... 186  
Bus hold procedure...................................................................................................................... 187  
Operation in power save mode.................................................................................................... 187  
5.9  
Bus Priority............................................................................................................................... 188  
5.10 Bus Timing................................................................................................................................ 189  
5.11 Cautions.................................................................................................................................... 195  
CHAPTER 6 CLOCK GENERATION FUNCTION............................................................................... 196  
6.1  
6.2  
6.3  
6.4  
Overview ................................................................................................................................... 196  
Configuration............................................................................................................................ 197  
Registers................................................................................................................................... 199  
Operation .................................................................................................................................. 203  
6.4.1  
6.4.2  
6.4.3  
Operation of each clock ............................................................................................................... 203  
Clock output function ................................................................................................................... 203  
External clock input function ........................................................................................................ 203  
6.5  
PLL Function ............................................................................................................................ 204  
6.5.1  
6.5.2  
6.5.3  
Overview...................................................................................................................................... 204  
Register ....................................................................................................................................... 204  
Usage .......................................................................................................................................... 205  
10  
User’s Manual U16890EJ1V0UD  
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