CHAPTER 1 INTRODUCTION
(i) Watchdog timer
Two watchdog timer channels are provided on chip to detect program loops and system abnormalities.
Watchdog timer 1 can be used as an interval timer. When used as a watchdog timer, it generates a non-
maskable interrupt request signal (INTWDT1) or system reset signal (WDTRES1) after an overflow
occurs. When used as an interval timer, it generates a maskable interrupt request (INTWDTM1) after an
overflow occurs.
Watchdog timer 2 operates by default following reset release.
It generates a non-maskable interrupt request signal (INTWDT2) or system reset signal (WDTRES2) after
an overflow occurs.
(j) Serial interface (SIO)
The V850ES/KF1 includes four kinds of serial interfaces: an asynchronous serial interface (UARTn), a
clocked serial interface (CSI0n), a clocked serial interface (with an automatic transmit/receive function)
(CSIA0), and an I2C bus interface (I2C0). The µPD703208, 703209, 703210, and 70F3210 can
simultaneously use up to five channels, and the µPD703208Y, 703209Y, 703210Y, and 70F3210Y up to
six channels.
For UARTn, data is transferred via the TXDn and RXDn pins.
For CSI0n, data is transferred via the SO0n, SI0n, and SCK0n pins.
For CSIA0, data is transferred via the SOA0, SIA0, and SCKA0 pins.
For I2C0, data is transferred via the SDA0 and SCL0 pins.
I2C0 is provided only for the µPD703208Y, 703209Y, 703210Y, and 70F3210Y.
For UART, a dedicated baud rate generator is provided on chip.
Remark n = 0, 1
(k) A/D converter
This high-speed, high-resolution 10-bit A/D converter includes 8 analog input pins. Conversion is
performed using the successive approximation method.
(l) ROM correction
This function is used to replace part of a program in the mask ROM with that contained in the internal
RAM. Up to four correction addresses can be specified.
(m) Key interrupt function
A key interrupt request signal (INTKR) can be generated by inputting a falling edge to the eight key input
pins.
(n) Real-time output function
This function transfers 6-bit data set beforehand to output latches upon occurrence of an external trigger
signal or a timer compare register match signal.
For the V850ES/KF1, a 1-channel 6-bit data real-time output function is provided on chip.
User’s Manual U15862EJ3V0UD
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NEC [ NEC ]
