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N08M163WL1AB-70I-TR 参数 Datasheet PDF下载

N08M163WL1AB-70I-TR图片预览
型号: N08M163WL1AB-70I-TR
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 512KX16, 70ns, CMOS, PBGA48]
分类和应用: 医疗静态存储器
文件页数/大小: 8 页 / 235 K
品牌: NANOAMP [ NANOAMP SOLUTIONS, INC. ]
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NanoAmp Solutions, Inc.  
Functional Block Diagram  
N08M163WL1A  
Word  
Address  
Inputs  
Address  
Decode  
Logic  
A - A  
0
3
W
o
r
Input/  
Page  
d
32K Page  
x 16 Word  
x 16 bit  
Output  
Address  
Inputs  
Address  
I/O - I/O  
0
7
Mux  
and  
Buffers  
M
u
A - A  
Decode  
Logic  
4
18  
x
RAM Array  
I/O - I/O  
8
15  
CE1#  
CE2  
WE#  
OE#  
UB#  
LB#  
Control  
Logic  
Functional Description  
I/O0 - I/O7  
CE1  
CE2  
WE  
OE  
MODE  
POWER  
Standby1  
Standby1  
Write2  
H
X
L
L
L
X
L
X
X
L
X
X
X2  
L
H
High Z  
High Z  
Standby  
Standby  
Active  
H
H
H
Data In  
Data Out  
High Z  
H
H
Active  
Active  
Read  
Active  
1. When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated  
from any external influence and disabled from exerting any influence externally.  
2. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.  
1
Capacitance  
Item  
Symbol  
CIN  
Test Condition  
Min  
Max  
8
Unit  
pF  
VIN = 0V, f = 1 MHz, TA = 25oC  
VIN = 0V, f = 1 MHz, TA = 25oC  
Input Capacitance  
I/O Capacitance  
CI/O  
8
pF  
1. These parameters are verified in device characterization and are not 100% tested  
Stock No. 23319-01 11/01/02  
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.  
2