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N04Q1625C2BT-70C 参数 Datasheet PDF下载

N04Q1625C2BT-70C图片预览
型号: N04Q1625C2BT-70C
PDF下载: 下载PDF文件 查看货源
内容描述: 4Mb的超低功耗异步SRAM CMOS瓦特/双Vcc和VCCQ的终极功率降低256K 】 16位POWER SAVER技术 [4Mb Ultra-Low Power Asynchronous CMOS SRAM w/ Dual Vcc and VccQ for Ultimate Power Reduction 256K】16 bit POWER SAVER TECHNOLOGY]
分类和应用: 静态存储器
文件页数/大小: 13 页 / 300 K
品牌: NANOAMP [ NANOAMP SOLUTIONS, INC. ]
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N04Q16yyC2B  
NanoAmp Solutions, Inc.  
Timing Test Conditions  
Advance Information  
Item  
0.1VCC to 0.9 VCC  
Input Pulse Level  
Input Rise and Fall Time  
Input and Output Timing Reference Levels  
Output Load  
5ns  
0.5 VCC  
CL = 30pF  
0 to +70oC  
Operating Temperature  
Timing  
-70  
-150  
Units  
Item  
Symbol  
Min.  
Max.  
Min.  
Max.  
tRC  
tAA  
Read Cycle Time  
70  
150  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Access Time  
70  
35  
70  
35  
70  
150  
75  
tAAP  
tCO  
tOE  
Page Mode Address Access Time  
Chip Enable to Valid Output  
150  
75  
Output Enable to Valid Output  
Byte Select to Valid Output  
tLB, UB  
t
150  
tLZ  
Chip Enable to Low-Z output  
Output Enable to Low-Z Output  
Byte Select to Low-Z Output  
Chip Disable to High-Z Output  
Output Disable to High-Z Output  
Byte Select Disable to High-Z Output  
Output Hold from Address Change  
10  
5
10  
5
tOLZ  
tLBZ, UBZ  
tHZ  
tOHZ  
LBHZ, tUBHZ  
tOH  
t
10  
0
10  
0
20  
20  
20  
20  
20  
20  
0
0
t
0
0
10  
10  
ns  
tWC  
tCW  
tAW  
Write Cycle Time  
Chip Enable to End of Write  
Address Valid to End of Write  
Byte Select to End of Write  
Write Pulse Width  
70  
50  
50  
50  
40  
0
150  
120  
120  
120  
100  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tLBW, UBW  
tWP  
tAS  
t
Address Setup Time  
tWR  
tWHZ  
tDW  
tDH  
Write Recovery Time  
0
0
Write to High-Z Output  
Data to Write Time Overlap  
Data Hold from Write Time  
End Write to Low-Z Output  
20  
20  
40  
0
100  
0
tOW  
5
5
ns  
Stock No. 23451-B 2/06  
The specification is ADVANCE INFORMATION and subject to change without notice.  
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