N04Q16yyC2B
NanoAmp Solutions, Inc.
Functional Block Diagram
Advance Information
Word
Address
Inputs
Address
Decode
Logic
(A1 - A4)
Input/
Address
Inputs
Page
4Mb
Output
Mux
I/O0 - I/O7
Address
Decode
Logic
RAM Array
and
(A0, A5 - A17)
Buffers
I/O8 - I/O15
CE1
CE2
WE
OE
Control
Logic
UB
LB
Functional Description
1
UB1
LB1
CE1
CE2
WE
OE
MODE
POWER
I/O0 - I/O15
Standby2
Standby2
H
X
L
L
L
L
X
L
H
H
H
H
X
X
X
L
X
X
X
X3
L
X
X
H
L1
L1
L1
X
X
H
L1
L1
L1
High Z
High Z
High Z
Data In
Data Out
High Z
Standby
Standby
Standby
Active
Standby
Write3
Read
Active
H
H
Active
H
Active
1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7
are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
1
Capacitance
Item
Symbol
CIN
Test Condition
Min
Max
8
Unit
pF
VIN = 0V, f = 1 MHz, TA = 25oC
VIN = 0V, f = 1 MHz, TA = 25oC
Input Capacitance
I/O Capacitance
CI/O
8
pF
1. These parameters are verified in device characterization and are not 100% tested
Stock No. 23451-B 2/06
The specification is ADVANCE INFORMATION and subject to change without notice.
3
NANOAMP [ NANOAMP SOLUTIONS, INC. ]
