NanoAmp Solutions, Inc.
Timing Test Conditions
N02L083WC2A
Item
0.1VCC to 0.9 VCC
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
5ns
0.5 VCC
CL = 30pF
-40 to +85 oC
Operating Temperature
Timing
2.3 - 3.6 V
2.7 - 3.6 V
Item
Symbol
Units
Min.
Max.
Min.
Max.
tRC
tAA
Read Cycle Time
70
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
70
70
35
55
55
30
tCO
tOE
tLZ
Chip Enable to Valid Output
Output Enable to Valid Output
Chip Enable to Low-Z output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
10
5
10
5
tOLZ
tHZ
0
20
20
0
15
15
tOHZ
tOH
tWC
tCW
tAW
tWP
tAS
0
0
10
70
50
50
40
0
10
55
45
45
35
0
Chip Enable to End of Write
Address Valid to End of Write
Write Pulse Width
Address Setup Time
tWR
tWHZ
tDW
tDH
tOW
Write Recovery Time
0
0
Write to High-Z Output
20
15
Data to Write Time Overlap
Data Hold from Write Time
End Write to Low-Z Output
40
0
35
0
5
5
ns
(DOC# 14-02-015 REV E ECN# 01-0998)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
5
NANOAMP [ NANOAMP SOLUTIONS, INC. ]
