NanoAmp Solutions, Inc.
Functional Block Diagram
Word
N01L083WC2A
Address
Address
Decode
Logic
Inputs
A0 - A3
Input/
Output
Mux
Page
Address
8K Page
x 16 word
x 8 bit
Address
Inputs
A4 - A16
Decode
Logic
and
I/O0 - I/O7
Buffers
RAM Array
CE1
CE2
WE
OE
Control
Logic
Functional Description
I/O - I/O
CE1
CE2
WE
OE
MODE
POWER
0
7
1
1
H
X
L
L
L
X
L
X
X
L
X
X
High Z
High Z
Data In
Standby
Standby
Active
Standby
Standby
2
2
H
H
H
X
Write
H
H
L
Data Out
High Z
Active
Read
H
Active
Active
1. When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated
from any external influence and disabled from exerting any influence externally.
2. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance1
Item
Symbol
Test Condition
Min
Max
8
Unit
pF
o
C
Input Capacitance
I/O Capacitance
V
V
= 0V, f = 1 MHz, T = 25 C
IN
IN
IN
A
o
C
8
pF
= 0V, f = 1 MHz, T = 25 C
I/O
A
1. These parameters are verified in device characterization and are not 100% tested
Stock No. 23033-03 1/02
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
2
NANOAMP [ NANOAMP SOLUTIONS, INC. ]
