Instruction Set Summary
LIST-XL Family
Instruction Cycle Lengths
Cycle
Length
Cycle Type
Command Read
Command Write
Data Write
Data Read
MOV reg, reg
Comparand register
(not last segment)
Mask register
TCO reg (except CT)
TCO CT (non-reset, HMA invalid)
SPS, SPD, SFR
Short
(not last segment)
SBR, RSC, NOP
MOV reg, mem
TCO CT (reset)
VBC (NFA invalid)
Status register or
16-bit register Sheets
Memory array
(NFA invalid)
Comparand register
Mask register
Medium
Memory array
(NFA valid)
Memory array
MOV mem, reg
TCO CT (non-reset, HMA valid)
CMP
Comparand register
(last segment)
Mask register
(last segment)
Long
VBC (NFA valid)
Table 6: Instruction Cycle Lengths
Note: The specific timing requirements for Short, Medium, and Long cycles are given in the Switching Characteristics section under the
tELEH parameter. For two cycle Command Writes (TCO reg or any instruction with “aaaH” as the source or destination), the first
cycle is short, and the second cycle is the length given.
Rev. 3.1
15
MUSIC [ MUSIC SEMICONDUCTORS ]
