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MU9C4320L-12TDI 参数 Datasheet PDF下载

MU9C4320L-12TDI图片预览
型号: MU9C4320L-12TDI
PDF下载: 下载PDF文件 查看货源
内容描述: 4K ×32的内容可寻址存储器(CAM )具有32位宽的数据接口 [4K x 32 Content Addressable Memory (CAM) with a 32-bit wide data interface]
分类和应用: 存储内存集成电路静态存储器双倍数据速率
文件页数/大小: 32 页 / 449 K
品牌: MUSIC [ MUSIC SEMICONDUCTORS ]
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MU9C4320L ATMCAM
Functional Description
The results of the Compare cycle have higher priority than
the VP Table lookup, and take precedence over it. In the
absence of a match in the CAM, the single bit accessed in
the VP Table is used to indicate whether there was a VP
Table match. Results of the Comparison cycle and VP
Table lookup are indicated through the /MV and /MF
outputs. Only the lowest-priority device in the system is
configured to hold the VP Table.
Vertical cascading is supported through a daisy chain
architecture. There are two daisy chains, one each for the
Match flag and the Full flag; the Multiple Match flag is
connected between devices with an open-drain line. The
Match flag (/MF) from a higher-priority device is
connected to the Match input (/MI) of the next
lower-priority device to provide prioritization throughout
a multiple device system. The /MF output from the lowest
priority device provides a system Match flag. If the delay
through the daisy chain is unacceptable, the /OE input can
be used by external priority-resolution circuitry to enable
the highest-priority responder in the system.
The match conditions on the Match, Match Valid, and
Multiple Match flag lines are persistent indicating the
results of the most recent Compare cycle. The Match flags
are free to change after the rising edge of /E during a
Compare cycle, at which time the daisy chain starts to
resolve device prioritization. Once the daisy chain has
settled, the /OE lines can be pulled LOW to access the
Highest-Priority Match address on the PA3–0:AA11–0
bus.
The Multiple Match open-drain output (/MM) provides
multiple match indication when there are two or more
matches in a single device, or a device has its /MI input
LOW and has a match; the /MM flags of all devices in the
system are wire-ORed. Multiple responders can be
accessed sequentially by resetting the Highest-Priority
Match latch with the control state “Advance Match
Address to Next Match.”
The Full flag (/FF) is cascaded from one device to the Full
Flag input (/FI) of the next lower-priority device in the
system. The /FF output from the lowest-priority device
provides a system Full flag. The Full flag is free to change
after the rising edge of /E during a Write cycle. The daisy
chains are persistent and are not conditioned by the /OE
input.
The ATMCAM supports JTAG boundary-scan testing
through the pins TCK, TMS, TDI, TDO, and /TRST,
according to the IEEE 1149 Standard: Test Access Port
and Boundary-scan Architecture.
8
Rev. 3