Register Bit Assignments
LIST-XL Family
Device
Bit(s)
31
Name
/FL
Description
0 = Internal CAM Full
0 = Internal Multiple Match
30
/MM
29:28
VB1-0
00 = Valid
01 = Empty
10 = Skip
11 = RAM
All
27:9
8:1
0
Reserved
3640L(F)
AM7–0
0
Match Address
Reserved
27:10
9:1
5640L(F)
All
AM8–0
/MF
Match Address
Match Flag
0
Table 10: Status Register Bits
Note: The Status register is read only, and is accessed by performing Command Read cycles. On the first cycle, bits 15–0 are output,
and if a second Command Read cycle is issued immediately after the first Command Read cycle, bits 31–16 are output.
Device
3640L(F)
5640L(F)
All
Bit(s)
15:4
15:4
3:0
Name
DEVID
DEVID
PS
Description
Device ID = 341H
Device ID = 541H
Persistent Source Setting
Table 11: Persistent Source Register Bits
Note: The Persistent Source register is read only, and is accessed by performing a Command Read cycle immediately following a TCO
PS instruction.
Rev. 3.1
17
MUSIC [ MUSIC SEMICONDUCTORS ]
