MU9C RCP Family
Switching Characteristics
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
-1.0 Volts for a duration of 10 ns measured at the 50% amplitude points for Input-only lines (see Figure 6 on page 28).
Common I/O lines are clamped, so that signal transients can not fall below -0.5 Volts.
Applies to all cycle types except Compare cycles and Memory Read cycles (memory to DQ).
Applies to Compare cycle (including NEXT).
Control signals are /CS1, /CS2, /W, /AV, DSC, and the AC bus.
With loads specified in Figure 5 on page 28, Test Load A from Table 8.
With loads specified in Figure 5 on page 28, Test Load B from Table 8.
/E should be HIGH during /RESET active to ensure proper device defaults.
Test inputs are TDI and TMS signals.
10. With output and I/O pins unloaded.
11. Pins with internal pull-ups are /RESET, TCLK, TMS, TDI, and /TRST.
30
Rev. 8.04
MUSIC [ MUSIC SEMICONDUCTORS ]
