LANCAM B Family
Register Bit Assignments
Next Free Address Bits
Device
Bit(s)
15:10
9:0
Name
Description
PA5–0
NF9-0
PA4-0
NF10-0
PA3–0
NF11-0
PA2–0
NF12-0
Page Address
1480B
Next Free Address
Page Address
15:11
10:0
2480B
4480B
8480B
Next Free Address
Page Address
15:12
11:0
Next Free Address
Page Address
15:13
12:0
Next Free Address
Note: The Next Free Address register is read only, and is accessed by performing a Command Read cycle immediately following a TCO
NF instruction.
Status Register Bits
Device
Bit(s)
31
Name
/FL
Description
0 = Internal CAM Full
0 = Internal Multiple Match
30
/MM
29:28
VB1-0
00 = Valid
01 = Empty
10 = Skip
11 = RAM
All
27
0
Reserved
26:16
15:11
10:1
PA15–5
PA4–0
AM9–0
PA15–4
PA3–0
AM10–0
PA14–3
PA2–0
AM11–0
PA13–2
PA1–0
AM12–0
/MA
Page Address (second read)
Page Address (first read)
Match Address
1480B
27:16
15:12
11:1
Page Address (second read)
Page Address (first read)
Match Address
2480B
4480B
27:16
15:13
12:1
Page Address (second read)
Page Address (first read)
Match Address
27:16
15:14
13:1
Page Address (second read)
Page Address (first read)
Match Address
8480B
All
0
Match Flag
Note: The Status register is read only, and is accessed by performing Command Read cycles. On the first cycle, bits 15–0 are output,
and if a second Command Read cycle is issued immediately after the first Command Read cycle, bits 31–16 are output.
Persistent Source Register Bits
Device
1480B
2480B
4480B
8480B
All
Bit(s)
15:4
15:4
15:4
15:4
3:0
Name
DEVID
DEVID
DEVID
DEVID
PS
Description
Device ID = 141H
Device ID = 240H
Device ID = 440H
Device ID = 840H
Persistent Source Setting
Note: The Persistent Source register is read only, and is accessed by performing a Command Read cycle immediately following a TCO
PS instruction.
24
Rev. 5.1
MUSIC [ MUSIC SEMICONDUCTORS ]
