®
+5V D
+5VA
+15V
1
2
3
+5VD
4
P3
5
6
+5VA
C27
C18
7
VREF
+5VA
GAIN
67
66
-15V
64
+15V
62
61
60
-5.2VA
C20
OFFSET
58
L11
+5VA
SG1 C21
+5VD
-5.2VD
59
SG3
L10
-5.2VA
-5.2VA
63
C19
65
20
Q1
Q2
4 3D
5 4D
6
U6
ALS573
Q3
Q4
Q5
Q6
Q7
Q8
GND OC
10
9 8D
11 CP
19
18
17
16
15
14
13
12
1
5D
7 6D
8 7D
68
C29
+
69
8
9
JPR3
C14
2
1
+15V
13
14
15
16
C16
17
18
19
+15V
2
1
22
23
24
-15V
25
26
27
-15V/80MA
5
+5V D
8
7
6
-V
4
C23
34
14
C26
+15V/50MA
1,7
1 INT
-5.2V D
C9
10PF
(OPT)
8
X1
10MHZ
35
36
37
38
OS3
33
32
O.F.
ENABLE
CLOCK
3
U4
LT1016 2
30
T/H
31
C3
+
29
T/H
+V
1
28
+5VA/350MA
R2
20K
+5V D
C22
+5VD 55
54
OFFSET
3 CW
C17
21
20
-5.2VD 57
DNC 56
-15V
R5
51.1
1
3 CW
R1
20K
GAIN
-15V
C15
-5.2VA
2
+15V
12
11
NC
3
10
70
71
72
L7
IN
73
74
U1
ADS945
75
76
HOLE PATTERN
0.1" GRID
®
SG2
AGND
SG4
AGND
-5.2V D
-5.2VA
-15V
DGND
DGND
MSB BIT 1
2 1D +5V
3 2D
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
D1
C1
P1
POWER SUPPLY
CONNECTOR
26
25
+
P2
DATA OUTPUT
CONNECTOR
34
32
30
28
C28
26
24
22
33
31
29
27
25
23
21
24
23
-5.2VD
L1
22
21
20
C2
19
+5VD
L2
18
17
D2
16
15
-5.2V
L3
+
DATA
LATCHES
5
BIT 6
BIT 10
+
C4
JPR2
CLOCK
2
3 EXT
1
INT
2
EXT
3
JPR1
OUTPUT ENABLE
P4
EXT. CLOCK
R3
51.1
(MSB) BIT 1 53
52
BIT 2
BIT 3 51
BIT 4 50
BIT 5 49
48
20
+5V
14
13
12
11
-15V
L4
10
9
8
7
+15V
L5
Q1
Q2
44
4 3D
5 4D
U7
Q3
19
18
17
16
20
2 1D
3 2D
BIT 9 18
BIT 10 16
BIT 11 14
BIT 12 12
BIT 13
LSB BIT 14
(LSB) BIT 14 40
39
OVERFLOW
CLOCK
EOC
10
10
8
6
4
2
19
17
15
13
11
9
7
5
3
1 ENABLE
BIT 11 43
42
BIT 12
BIT 13 41
Q4
6 5D ALS573
15
Q5
7 6D
14
Q6
8 7D
13
Q7
9 8D
12
Q8
11 CP
1
GND OC
BIT 7 47
46
BIT 8
BIT 9 45
6
5
D3
4
3
L6
2
1
+5VA
D4
R12
10K
ADS-945
Figure 3. ADS-945 Evaluation Board Schematic (DATEL Dwg. #A-23442)
MURATA-PS [ MURATA POWER SOLUTIONS INC. ]
