®
®
ADS-943
+25°C
DYNAMIC PERFORMANCE cont.
S/H Acquisition Time
( to ±0.003%FSR, 4V step)
Overvoltage Recovery Time
A/D Conversion Rate
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Coding
POWER REQUIREMENTS
Power Supply Ranges
+5V Supply
–5V Supply
Power Supply Currents
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
+4.75
–4.75
—
—
—
—
+5.0
–5.0
+210
–125
1.7
—
+5.25
–5.25
+230
–145
1.9
±0.05
+4.75
–4.75
—
—
—
—
+5.0
–5.0
+210
–125
1.7
—
+5.25
–5.25
+230
–145
1.9
±0.05
+4.9
–4.9
—
—
—
—
+5.0
–5.0
+210
–125
1.7
—
+5.25
–5.25
+230
–145
1.9
±0.05
Volts
Volts
mA
mA
Watts
%FSR/%V
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
+2.4
—
—
—
—
—
—
+0.4
—
–4
—
+4
Offset Binary
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
Volts
Volts
mA
mA
MIN.
—
—
3
TYP.
208
100
—
MAX.
215
333
—
MIN.
—
—
3
0 to +70°C
TYP.
208
100
—
MAX.
215
333
—
MIN.
—
—
3
–55 to +125°C
TYP.
208
100
—
MAX.
215
333
—
UNITS
ns
ns
MHz
Footnotes:
All power supplies should be on before applying a start convert pulse. All
supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.
Contact DATEL for other input voltage ranges.
A 3MHz clock with a 20nsec positive pulse width is used for all production testing.
When sampling at 3MHz, the start convert pulse must be between 10 and
110nsec wide or between 160 and 300nsec wide. The falling edge must not occur
between 110 and 160nsec. For lower sampling rates, wider start pulses may be
used.
Effective bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
6.02
Full Scale Amplitude
Actual Input Amplitude
This is the time required before the A/D output data is valid once the analog input
is back within the specified range. This time is only guaranteed if the input does
not exceed ±2.2V (S/H Saturation Voltage).
The minimum supply voltages of +4.9V and –4.9V for ±V
DD
are required for
–55°C operation only. The minumum limits are +4.75V and –4.75V when
operating at +125°C.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-943
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 19 and 24) directly to a
large
analog
ground plane beneath the package.
Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-943 achieves its specified accuracies without the
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 2 and 3.
When using this circuitry, or any similar offset and gain-
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
GAIN
ADJUST
+5V
SIGNAL
INPUT
1.98k
Ω
50
Ω
To Pin21
of ADS-943
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
4. A passive bandpass filter is used at the input of the A/D for
all production testing.
2k
Ω
–5V
Figure 2. Optional ADS-943 Gain Adjust Calibration Circuit
3
MURATA-PS [ MURATA POWER SOLUTIONS INC. ]
