®
®
ADS-931
CALIBRATION PROCEDURE
Connect the converter per Figure 2. Any offset/gain calibration
procedures should not be implemented until the device is fully
warmed up. To avoid interaction, adjust offset before gain. The
ranges of adjustment for the circuits in Figure 2 are guaranteed
to compensate for the ADS-931’s initial accuracy errors and
may not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital
output codes. This is accomplished by connecting LED's to the
digital outputs and performing adjustments until certain LED's
"flicker" equally between on and off. Other approaches employ
digital comparators or microcontrollers to detect when the
outputs change from one code to the next.
For the ADS-931, offset adjusting is normally accomplished
when the analog input is 0 minus �½ LSB (–42µV). See Table
2b for the proper bipolar output coding.
Gain adjusting is accomplished when the analog input is at
nominal full scale minus 1�½ LSB's (+2.749874V).
Note: Connect pin 5 to ANALOG GROUND (pin 4) for
operation without zero/offset adjustment. Connect pin 6 to pin 4
Table 2a. Setting Output Coding Selection (Pin 35)
for operation without gain adjustment.
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input (pin
12) so that the converter is continuously converting.
2. For unipolar or bipolar zero/offset adjust, apply –42µV to the
ANALOG INPUT (pin 3).
3. For bipolar inputs, adjust the offset potentiometer until the
code flickers between 1000 0000 0000 0000 and 0111
1111 1111 1111 with pin 35 tied high (complementary
offset binary) or between 0111 1111 1111 1111 and 1000
0000 0000 0000 with pin 35 tied low (offset binary).
For unipolar inputs, adjust the offset potentiometers until all
output bits are 0's and the LSB flickers between 0 and 1
with Pin 35 tied high (straight binary) or until all bits are 1's
and the LSB flickers between 0 and 1 with pin 35 tied low
(complementary binary).
4. Two's complement coding requires using BIT 1 (MSB) (pin
29). With pin 35 tied low, adjust the trimpot until the output
code flickers between all 0’s and all 1’s.
Gain Adjust Procedure
1. Apply +2.749874V to the ANALOG INPUT (pin 3).
2. For bipolar inputs, adjust the gain potentiometer until all output
bits are 0’s and the LSB flickers between a 1 and 0 with pin 35
tied high (complementary offset binary) or until all output bits
are 1’s and the LSB flickers between a 1 and 0 with pin 35 tied
low (offset binary).
3. Two's complement coding requires using BIT 1 (MSB)
(pin 29). With pin 35 tied low, adjust the gain trimpot until
the output code flickers equally between 0111 1111 1111
1111 and 0111 1111 1111 1110.
OUTPUT FORMAT
Complementary Offset Binary
Offset Binary
Complementary Two’s Complement
(Using MSB, pin 29)
Two’s Complement
(Using MSB, pin 29)
Straight Binary
Complimentary Binary
PIN 35 LOGIC LEVEL
1
0
1
0
1
0
20k
Ω
+5V
–5V
+5V
20k
Ω
–5V
6
GAIN
ADJUST
+5V
4.7µF
0.1µF
31
+5V
DIGITAL
5
OFFSET
ADJUST
33 OVERFLOW
32 EOC
29 BIT 1 (MSB)
28 BIT 1 (MSB)
27
26
25
24
23
22
21
20
BIT2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
DIGITAL
7, 30 GROUND
+
+5V
4.7µF
38
0.1µF
+5V ANALOG
+
ANALOG
4, 36 GROUND
–5V
4.7µF
0.1µF
37
–5V
ADS-931
34
8
CONNECT for UNIPOLAR MODE
10
2
6.8µF
11
1
0.1µF
4.7µF
ENABLE
FIFO/DIR
FSTAT1
ANALOG INPUT
UNIPOLAR
FIFO READ 9
FSTAT2
+3.2V
REF. OUT
START CONVERT 12
COMP. BITS 35
3
BIT 9
19 BIT 10
18 BIT 11
17 BIT 12
16 BIT 13
15 BIT 14
14 BIT 15
13 BIT 16 (LSB)
+5V
Figure 2. Bipolar Connection Diagram
5
MURATA-PS [ MURATA POWER SOLUTIONS INC. ]
