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ADS-119 参数 Datasheet PDF下载

ADS-119图片预览
型号: ADS-119
PDF下载: 下载PDF文件 查看货源
内容描述: 12位, 10MHz的,低功耗采样A / D转换器 [12-Bit, 10MHz, Low-Power Sampling A/D Converters]
分类和应用: 转换器
文件页数/大小: 8 页 / 136 K
品牌: MURATA-PS [ MURATA POWER SOLUTIONS INC. ]
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®
®
ADS-119
+25°C
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Coding
POWER REQUIREMENTS
Power Supply Ranges
‘
+5V Supply
–5V Supply
Power Supply Current
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
+4.75
–4.75
+5.0
–5.0
+200
–180
1.8
+5.25
–5.25
+215
–205
2.1
±0.01
+4.75
–4.75
+5.0
–5.0
+200
–180
1.8
+5.25
–5.25
+215
–205
2.1
±0.01
+4.9
–4.9
+5.0
–5.0
+200
–180
1.8
+5.25
–5.25
+215
–205
2.1
±0.01
Volts
Volts
mA
mA
Watts
%FSR/%V
MIN.
+2.4
TYP.
MAX.
+0.4
–4
+4
MIN.
+2.4
0 to +70°C
TYP.
MAX.
+0.4
–4
+4
Offset Binary
MIN.
+2.4
–55 to +125°C
TYP.
MAX.
+0.4
–4
+4
UNITS
Volts
Volts
mA
mA
Footnotes:
Œ
All power supplies must be on before applying a start convert pulse. All supplies
and the clock (START CONVERT) must be present during warmup periods. The
device must be continuously converting during this time. There is slight
degradation in performance when using ±12V supplies.

See ordering information for availability of ±5V input range. Contact DATEL for
availability of other input voltage ranges.
Ž
A 200ns wide start convert pulse is used for all production testing. Only the rising
edge of the start convert pulse is required for the device to operate
(edge-triggered).

Effective bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
6.02
Full Scale Amplitude
Actual Input Amplitude

This is the time required before the A/D output data is valid after the analog input
is back within the specified range.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-119
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 18, and 23) directly to
a large analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-119 achieves its specified accuracies without the
need for external calibration. If required, the device's small
N
START
CONVERT
50ns typ.
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 3 and 4. For
operation without adjustment, tie pin 17 to analog ground.
When using this circuitry, or any similar offset and gain-
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle.
4. Data is valid only for the time period (55ns, typical) shown in
Figure 2 even if the device is sampling at less than 10MHz.
N+1
10ns typ.
INTERNAL S/H
Hold
65ns typ.
Acquisition Time
30ns min.
35ns typ.
37ns max.
20ns typ.
72ns min.
80ns typ.
83ns max.
Hold
15ns typ.
INTERNAL EOC
Conversion Time
35ns typ.
DATA
VALID
40ns typ.
±5ns
60ns typ.
40ns typ.
±5ns
10ns typ.
DATA
INVALID DATA
DATA N-1 VALID
55ns typ.
45ns typ.
DATA N VALID
INVALID DATA
INVALID DATA
Scale is approximately 5ns per division.
Figure 2. ADS-119 Timing Diagram
3