www.murata-ps.com
ADC-208A
8-Bit, 20MSPS CMOS Flash A/D (ADC-208 Compatible)
PRODUCT OVERVIEW
The ADC-208A utilizes an advanced VLSI 1.2
micron CMOS in providing 20MHz sampling rates
at 8-bits. The flexibility of the design architecture
and process delivers latch-up free operation
without external components and operation over
the full military range.
The ADC-208A is mechanically and electri-
cally equivalent to the ADC-208 Series, with the
exception of the OVERFLOW (pin 13) and ENABLE
(pins 11 and 12) functions. These functions are not
offered on the ADC-208A.
FEATURES
■
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■
■
■
■
■
■
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Pin
1
2
3
4
5
6
7
8
9
10
11
12
8-bit flash A/D converter
20MHz sampling rate
10MHz full-power bandwidth
Sample-hold not required
Low power CMOS
+5Vdc operation
1.2 Micron CMOS
8-Bit latched outputs
Surface-mount version
No missing codes
INPUT/OUTPUT CONNECTIONS
FUNCTION
Pin
24
VDD
CLOCK INPUT
–REFERENCE
ANA/DIG GND (VSS)
ANALOG INPUT
REF MIDPOINT
ANALOG INPUT
ANA/DIG GND (VSS)
+REFERENCE
VDD
N.C.
N.C.
23
22
21
20
19
18
17
16
15
14
13
FUNCTION
BIT 8 (LSB)
BIT 7
BIT 6
BIT 5
REF 1/4 FS
VDD
REF 3/4 FS
BIT 4
BIT 3
BIT 2
BIT 1 (MSB)
N.C.
02
01
ANALOG INPUT
02
01
CLOCK
GENERATOR
2
CLOCK
5,7
R2
+REFERENCE
9
D
R
G
1Ω
Q
D
G
Q
14
BIT 1
D
G
Q
D
G
D
G
R2
Q
256 to
7 ENCODER
D
G
Q
15
BIT 2
¾ REFERENCE
18
D
G
R
Q
16
BIT 3
1Ω R2
MIDPOINT
REFERENCE
6
Q
17
BIT 4
1Ω
¼ REFERENCE
20
R2
D
G
D
G
R
R2
Q
D
G
Q
Q
21
BIT 5
22
BIT 6
– REFERENCE
3
D
D
G
Q
G
DIGITAL GND
Q
PINS 1, 10, 19 +5V
+V
DD
23
BIT 7
24
PINS 4-8
ANALOG GND
BIT 8
(LSB)
For full details go to
www.murata-ps.com/rohs
Figure 1. ADC-208A Block Diagram
www.murata-ps.com
Technical enquiries
email: data.acquisition@murata-ps.com, tel:
+1 508 339 3000
MDA_ADC-208A.B01
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