TYPICAL SYSTEM OPERATION
The MSK 4354 is designed to be used with a +270 volt high voltage bus, +15 volt low power bus and +5 volt
logic signals. Proper derating should be applied when designing the MSK 4354 into a system. High frequency layout
techniques with ground planes on a printed circuit board is the only method that should be used for circuit construc-
tion. This will prevent pulse jitter caused by excessive noise pickup on the current sense signal or the error amp
signal.
Ground planes for the lower power circuitry and the high power circuitry should be kept separate. The connection
between the bottom of the current sense resistor, COM pin and the high power ground, AV-, BV- and CV- pins are
connected at this point. This is a critical path and high currents should not be flowing between the current sense and
COM. Inductance in this path should be kept to a minimum. An RC filter (shown in 2 places) will filter out the current
spikes and keep the detected noise for those circuits down to a minimum.
In the system shown a PWM pulse by pulse current limit scheme controlled by the motor controller is implemented.
When controlling the motor speed by the PWM method, it is required that the low side switches be PWM pulsed due
to the bootstrap supplies used to power the high side switch drives. The higher the PWM speed the higher the current
load on the drive supply. PWM of the low side will prevent sagging of the high side supplies. A separate pin (+VB)
is provided for connecting an external floating power supply to power the bootstrap supplies.
5
Rev. E 12/04
MSK [ M.S. KENNEDY CORPORATION ]
