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MP1038EM-LF 参数 Datasheet PDF下载

MP1038EM-LF图片预览
型号: MP1038EM-LF
PDF下载: 下载PDF文件 查看货源
内容描述: [Liquid Crystal Driver, PDSO28, LEAD FREE, TSSOP-28]
分类和应用: 驱动光电二极管接口集成电路
文件页数/大小: 11 页 / 224 K
品牌: MPS [ MONOLITHIC POWER SYSTEMS ]
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MP1038 – FULL BRIDGE CCFL CONTROLLER  
PIN FUNCTIONS  
For TSSOP28 and SOIC28 devices  
Pin #  
Name  
Description  
1
SI  
Secondary Current Feedback Input. Connect a current sense resistor from the cold end of  
the secondary winding to ground. Connect this pin to the junction of the resistor and the  
secondary winding. If the voltage at SI exceeds +1.2V, a pulse of current will pull down on  
the COMP pin to attempt to regulate the secondary current and the Fault Timer will be  
started.  
2
3
LI  
Lamp Current Feedback Input. Connect this pin to the cold end of the lamp and shunt a  
sense resistor to ground. The sense amplifier will sink a current from the COMP pin  
proportional to the absolute value of the voltage at this pin. (In regulation the average of the  
absolute value of the voltage at this pin is determined by the voltage at the ABRT pin).  
LV  
Lamp Voltage Feedback Input. Connect a capacitive voltage divider from the hot end of the  
lamp to ground. Connect this pin to the tap on the divider and shunt a bias resistor to  
ground. If the voltage at LV exceeds +1.2 V, a pulse of current will pull down on the COMP  
pin to attempt to regulate the lamp voltage and the Fault Timer will be started.  
4
5
6
7
COMP  
AG  
Feed back Compensation Node. Connect a compensation capacitor from this pin to ground.  
Analog Ground.  
FT  
Fault Timing. Connect a timing capacitor from this pin to AG to set the fault timeout period.  
LCS  
Lamp operating Clock Set. Connect a resistor from this pin to AG. This resistor sets the  
operating frequency of the MP1038.  
8
LCC  
Lamp Clock Control. LCC provides compensation when the operating clock is swept in order  
to strike the lamp. Connect a resistor in series with a capacitor from LCC to AG. Connect a  
smaller capacitor directly from LCC to AG. Connect only a single capacitor to AG, if some  
sweeping of the operating clock can be tolerated during open lamp conditions. Connect LCC  
to AG to force the operating clock to the selected value at all times.  
9
BRC  
BRS  
Burst Repetition rate Control. BRC provides compensation when the burst repetition rate is  
to be synchronized to an external clock. Connect a resistor in series with a capacitor from  
BRC to AG. Connect a smaller capacitor directly from BRC to AG. If the burst repetition rate  
is not to be synchronized to an external clock, connect BRC to AG.  
10  
Burst Repetition rate Setting. If the burst repetition rate is to be synchronized to an external  
clock, connect a capacitor from BRS to AG. If the burst rate generator is free-run and not be  
synchronized with an external clock, connect a resistor in parallel with a capacitor from BRS  
to AG. If the burst is to be controlled by an external logic signal, connect BRS to VCC and  
apply the logic signal to the DBRT pin.  
11  
DBRT  
ABRT  
Burst-Mode (Digital) Brightness Control Input. The voltage range of 0V to 1.2V at DBRT  
linearly sets the burst-mode duty cycle from minimum 10% to 100%. If burst dimming is not  
used tie DBRT to VCC.  
12  
13  
Analog Brightness Control Input. The voltage range of 0V to 1.2V at ABRT sets 3:1 dimming  
range for the lamp current. If analog dimming is not used, tie ABRT to VCC.  
ENSYNC Enable and Sync Composite Input. Pull ENSYNC high to turn on the MP1038, pull ENSYNC  
low to turn it off. To synchronize the burst repetition rate to an external clock, apply the  
synchronizing clock signal with low-going pulse width of 1-10us to this pin. Once the  
MP1038 has aligned the burst oscillator to the sync signal, each burst will start at the low-  
going edge of the sync pulse.  
14  
15  
LOK  
Lamp OK Flag Output (open drain). Connect this pin to a pull-up resistor to logic high. This  
pin will not be activated during normal operation (including burst mode) nor when the  
MP1038 is disabled. This pin will be pulled low when a fault (open lamp or secondary  
over-current) is detected.  
PRR  
Input Power Rail, Right-Side. Connect PRR directly to the drain of the high-side, right-side,  
external power MOSFET.  
10/07, Rev. 1.4  
www.MonolithicPower.com  
4