MP1010B – COLD CATHODE FLUORESCENT LAMP DRIVER
APPLICATION INFORMATION
Brightness Control
For an application with either Analog Mode or
The maximum lamp current is set by Rlfb:
no dimming, the BOSC pin can be shorted to
Analog GND to simplify the circuit.
2.2 × VIL _MAX
Rlfb =
For analog dimming, a voltage between 1.9V
and 5V sets the maximum brightness. 0V sets
the minimal brightness, wherein lamp current is
1/3 of the maximum value. Most applications
need a RC filter to eradicate noises before the
DC signal reaches the ABRT pin. The
suggested values are Rabr=47kꢀ, Cabr=0.1µF.
ILAMP _RMS
Where VIL_MAX = 379mV, typically. For a 6mARMS
lamp current, Rlfb = 139ꢀ. Use a 140ꢀ ±1%
resistor for the application.
The MP1010B can adjust the lamp brightness
in three operating modes: Analog Mode, Burst
Mode with a DC input, or Burst Mode with
external PWM. The Burst Mode with a DC input
is not recommended if the dimming steps
required are more than 10. For such
applications, please select the MP1016 or
MP1028.
For burst dimming with a DC input, a voltage
between 1.8V and 5V sets the maximum duty
cycle (100%). 0V sets the minimum duty cycle,
which is related to the design of Rbosc and
Cbosc. Again, most applications need a RC
filter to eradicate noises before the DC signal
reaches the DBRT pin. The suggested values
are Rdbr=47kꢀ, Cdbr=0.1µF.
The three modes are dependent on the pin
connections as per the table below.
Select Rbosc and Cbosc based on the following:
1. Select a burst frequency fBOSC for the panel.
Table 1—Dimming Mode Selection
Pin 3 (BOSC)
Pin 1
(ABRT) (DBRT)
Pin 4
Options
2. Design the minimal duty cycle to meet the
minimal pulse request for the lamp.
Rbosc Cbosc
Burst Mode
with PWM
Input
Analog Mode
with DC Input
DMIN ≥ 250μs × fBOSC
VREF
PWM 220kꢀ 100kꢀ
100kꢀ/
3. Determine Rbosc by the formula:
0V to
1.9V
VREF
220kꢀ
1.68
47nF
Rbosc ≅
0.42 × DMIN × 350 ×10−6
Burst Mode
with DC Input
0V to
1.8V
VREF
220kꢀ 47nF
4. Determine Cbosc by the formula:
(1− DMIN
0.42 × Rbosc × fBOSC
)
The PWM signal should be 200Hz (±50Hz) for
the best possible performance. For different
panels, the burst frequency may need adjusting
to avoid possible interference with the LCD
horizontal scan frequency. The PWM signal
High level should be larger than 1.7V but less
than 5V. The Low level should be smaller than
0.7V but higher than 0V. It is recommended that
the PWM minimum pulse be longer than 250µs,
and that the pulse rising and falling edges be
less than 0.5µs. The PWM signal should be
connected to the DBRT pin directly (Rdbr = 0ꢀ
and remove Cdbr).
Cbosc ≈
For a typical design, Rbosc=220kꢀ and
C1=47nF.
MP1010B Rev. 2.2
6/30/2009
www.MonolithicPower.com
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