HFC0100—QUASI RESONANT CONTROLLER
VCC Under-Voltage Lock-out
+
When the Vcc below the UVLO threshold-8V, the
HFC0100 stops switching and the internal high
voltage current source unit re-starts, the Vcc
external bulk capacitor is re-charged by it.
2 Vcc
RVSD
1
VSD
Figure 5 shows the typical waveform with Vcc
under voltage lock out.
6V
HFC0100
Figure 6—OVP Sample Unit
To avoid the mis-trigger due to the oscillation of
the leakage inductance and the parasitic
capacitance, the OVP sampling has a TOVPS
blanking, typical 3.5μS, shows as Figure 7.
Figure 5—Vcc Under-Voltage Lock Out
Over-Voltage Protection (OVP)
The positive plateau of auxiliary winding voltage
is proportional to the output voltage, the OVP use
the auxiliary winding voltage instead of directly
monitoring the output voltage.
Figure 7
Over Load Protection (OLP)
The maximum output power is limited by the
maximum switching frequency and maximum
primary peak current. If the output consumes
more than the maximum output power, the output
voltage is drawn below the set point, this reduces
the current through the optocoupler LED, which
also reduces the transistor current, thus
increases the FB voltage.
The Figure 6 shows the OVP sample unit.
If the voltage:
Naux
24kΩ
VO
6V
NSEC 24kΩ RVSD
VO—Output voltage
Naux —Auxiliary Winding Turns of the transformer
SEC—Secondary Winding Turns of the
By continuously monitoring the Pin FB voltage,
when the feedback voltage exceeds the
threshold VOLP—3.7V, it shuts off the switching
cycle. The HFC0100 enters a safe low power
operation that prevents from any lethal thermal or
stress damage. As soon as the default
disappears, the power supply resumes operation.
N
transformer
The OVP circuit is triggered, and the HFC0100
stops the switching cycle and goes into latched
fault condition. The controller stays fully latched
in this position until the Vcc is decreased down to
3V, e.g. when the user unplugs the power supply
from the main supply and re-plugs it.
During the start up or load transient, the FB
voltage will be high enough temporarily to mis-
trigger the OLP, to prevent this undesired
protection, OLP circuit is designed to be triggered
after Vcc is decreased below 8.5V.
HFC0100 Rev. 1.03
11/28/2017
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