Bus Signal Timing
CLKOUT
TA
B20
B21
D[0:31],
DP[0:3]
Figure 9-8. Input Data Timing when Controlled by UPM in the Memory Controller
and DLT3 = 1
Figure 9-9 through Figure 9-12 provide the timing for the external bus read controlled by
various GPCM factors.
CLKOUT
B11
B8
B12
TS
A[0:31]
CSx
B22
B23
B25
B26
B19
OE
B28
WE[0:3]
B18
D[0:31],
DP[0:3]
Figure 9-9. External Bus Read Timing (GPCM Controlled—ACS = 00)
24
MPC860 Family Hardware Specifications
MOTOROLA