Freescale Semiconductor, Inc.
Pinout and Signal Descriptions
Table 3-4. Port Pull-Up, Pull-Down and Reduced Drive Summary
Enable Bit
Reduced Drive Control Bit
Port
Name
Resistive
Input Loads
Register
(Address)
Reset
State
Register
(Address)
Reset
State
Bit Name
Bit Name
Port A
Port B
Pull-up
Pull-up
PUCR ($000C)
PUCR ($000C)
PUPA
PUPB
Disabled RDRIV ($000D)
Disabled RDRIV ($000D)
RDPA
RDPB
Full drive
Full drive
Port E:
PE7,
PE[3:2]
PE[1:0]
PE[6:4]
Pull-up
PUCR ($000C)
PUPE
PUPE
Enabled RDRIV ($000D)
RDPE
Full drive
Pull-up
None
PUCR ($000C)
—
Enabled
—
RDRIV ($000D)
RDPE
RDPG
Full drive
Full drive
Pull-up or
Pull-
Port G
Port H
PUCR ($000C)
PUCR ($000C)
PUPG
PUPH
Enabled RDRIV ($000D)
Enabled RDRIV ($000D)
(1)
down
Pull-up or
Pull-
RDPH
Full drive
(2)
down
Port P
Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
PWCONT ($0054) PUPP
PURDS ($00D9) PUPS0
PURDS ($00D9) PUPS1
PURDS ($00D9) PUPS2
Disabled PWCONT ($0054) RDPP
Full drive
Full drive
Full drive
Full drive
Full drive
PS[1:0]
PS[3:2]
PS[7:4]
Port T
Disabled PURDS ($00DB)
Disabled PURDS ($00DB)
Disabled PURDS ($00DB)
Disabled TMSK2 ($008D)
RDPS0
RDPS1
RDPS2
TDRB
TMSK2 ($008D)
PUPT
PortCAN[1]:
TxCAN
None
—
—
—
PortCAN[0]:
RxCAN
Port
Pull-up
Pull-up
Always enabled
PCTLCAN
($013D)
PUPCAN Disabled PCTLCAN ($013D) RDPCAN Full drive
CAN[7:2]
Port AD0
Port AD1
None
None
—
—
—
—
1. Pull-Up when PGUPD input pin is high, Pull-down when PGUPD input pin is low.
In the 80-pin version, PGUPD is internally tied to VDD, hence PG4 is pulled up.
2. Pull-Up when PHUPD input pin is high, Pull-down when PHUPD input pin is low.
In the 80-pin version, PHUPD is internally tied to VSS, hence PH4 is pulled down.
Advance Information
68HC(9)12D60 — Rev 4.0
MOTOROLA
61
Pinout and Signal Descriptions
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MOTOROLA [ MOTOROLA ]
