TIP120 TIP121 TIP122 TIP125 TIP126 TIP127
r(t), TRANSIENT THERMAL RESISTANCE
(NORMALIZED)
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
0.03
0.02
0.05
0.02
0.01
SINGLE PULSE
0.01
0.01
0.02
0.05
0.1
0.2
0.5
1.0
2.0
5.0
t, TIME (ms)
10
20
50
100
200
500
1.0 k
D = 0.5
0.2
0.1
P(pk)
Z
θJC(t)
= r(t) R
θJC
R
θJC
= 1.92°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
t1
READ TIME AT t1
t2
TJ(pk) – TC = P(pk) Z
θJC(t)
DUTY CYCLE, D = t1/t2
Figure 4. Thermal Response
20
IC, COLLECTOR CURRENT (AMP)
10
5.0
2.0
1.0
0.5
0.2
0.1
0.05
0.02
1.0
500
µs
dc
TJ = 150°C
BONDING WIRE LIMITED
THERMALLY LIMITED
1 ms
@ TC = 25°C (SINGLE PULSE)
5 ms
SECOND BREAKDOWN LIMITED
CURVES APPLY BELOW
RATED VCEO
TIP120, TIP125
TIP121, TIP126
TIP122, TIP127
2.0 3.0
5.0 7.0 10
20 30
50
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
70 100
100
µs
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
down. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation,
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
The data of Figure 5 is based on T J(pk) = 150
_
C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T J(pk)
< 150
_
C. T J(pk) may be calculated from the data in Figure 4.
At high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown
Figure 5. Active–Region Safe Operating Area
10,000
h fe , SMALL–SIGNAL CURRENT GAIN
5000
3000
2000
1000
500
300
200
100
50
30
20
10
1.0
2.0
TC = 25°C
VCE = 4.0 Vdc
IC = 3.0 Adc
300
TJ = 25°C
200
C, CAPACITANCE (pF)
Cob
100
70
50
PNP
NPN
0.2
0.5 1.0 2.0
5.0 10
20
VR, REVERSE VOLTAGE (VOLTS)
50
100
Cib
PNP
NPN
5.0
10
20
50 100
f, FREQUENCY (kHz)
200
500 1000
30
0.1
Figure 6. Small–Signal Current Gain
Figure 7. Capacitance
Motorola Bipolar Power Transistor Device Data
3
MOTOROLA [ MOTOROLA, INC ]
