Freescale Semiconductor, Inc.
Memory Map
Additional Status and Control Registers
Addr.
$004B
$004C
Register Name
PIT Status and Control Register Read:
(PSC) Write:
PIT Counter Register High Read:
(PCNTH) Write:
Read:
Write:
Bit 7
POF
0
Bit 15
Bit 7
6
POIE
14
6
5
PSTOP
13
5
4
0
PRST
12
4
3
0
11
3
2
PPS2
10
2
1
PPS1
9
1
Bit 0
PPS0
Bit 8
Bit 0
$004D PIT Counter Register Low (PCNTL)
$004E
PIT Modulo Register High Read:
(PMODH) Write:
Read:
Write:
Bit 15
Bit 7
14
6
13
5
12
4
11
3
10
2
9
1
Bit 8
Bit 0
Freescale Semiconductor, Inc...
$004F PIT Modulo Register Low (PMODL)
= Unimplemented
R
= Reserved
Figure 2-2. I/O Data, Status and Control Registers (Sheet 5 of 5)
2.4 Additional Status and Control Registers
Selected addresses in the range $FE00 to $FFCB contain additional
Status and Control registers as shown in
Figure 2-3.
A noted exception
is the COP Control Register (COPCTL) at address $FFFF.
Addr.
$FE00
Register Name
SIM Break Status Register Read:
(SBSR) Write:
Read:
Write:
R
R
14
6
R
R
13
5
R
EEMONSEC
Bit 7
R
POR
6
R
PIN
5
R
COP
4
R
ILOP
3
R
ILAD
2
R
0
1
BW
0
LVI
Bit 0
R
0
$FE01 SIM Reset Status Register (SRSR)
$FE03
$FE09
$FE0C
$FE0D
SIM Break Flag Control Register Read:
BCFE
(SBFCR) Write:
Configuration Write-Once Register Read:
EEDIVCLK
(CONFIG-2) Write:
Break Address Register High Read:
(BRKH) Write:
Break Address Register Low Read:
(BRKL) Write:
Bit 15
Bit 7
R
AZ32A
R
11
3
R
R
10
2
R
R
9
1
R
R
Bit 8
Bit 0
12
4
Figure 2-3. Additional Status and Control Registers (Sheet 1 of 2)
68HC908AZ32A — Rev 0.0
MOTOROLA
Memory Map
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MOTOROLA [ MOTOROLA, INC ]
