LIST OF TABLES
(Continued)
Table
Title
Page
6-5
6-6
7-1
7-2
Serial Frame Formats ...................................................................................6-26
Effect of Parity Checking on Data Size .........................................................6-27
GPT Status Flags ............................................................................................7-4
GPT Interrupt Sources ....................................................................................7-5
PWM Frequency Ranges Using 16.78-MHz/20.97-MHz System Clocks ......7-17
Maximum Ratings .......................................................................................... A-1
Typical Ratings, 16.78 MHz Operation .......................................................... A-2
Typical Ratings, 20.97 MHz Operation ......................................................... A-2
Thermal Characteristics ................................................................................. A-3
16.78 MHz Clock Control Timing ................................................................... A-3
20.97 MHz Clock Control Timing ................................................................... A-4
16.78 MHz DC Characteristics ....................................................................... A-5
20.97 MHz DC Characteristics ....................................................................... A-6
16.78 MHz AC Timing .................................................................................... A-8
20.97 MHz AC Timing .................................................................................... A-9
Background Debugging Mode Timing .......................................................... A-20
16.78 MHz ECLK Bus Timing ...................................................................... A-22
20.97 MHz ECLK Bus Timing ...................................................................... A-22
QSPI Timing ................................................................................................. A-24
MCU Ordering Information ............................................................................. B-4
Quantity Order Suffix ...................................................................................... B-4
MC68331 Development Tools ........................................................................C-1
Module Address Map .....................................................................................D-1
GPT Address Map ..........................................................................................D-4
SIM Address Map .........................................................................................D-13
Port E Pin Assignments ...............................................................................D-18
Port F Pin Assignments ................................................................................D-19
Software Watchdog Ratio ............................................................................D-19
Bus Monitor Period .......................................................................................D-20
CSPAR0 Pin Assignments ...........................................................................D-22
CSPAR1 Pin Assignments ...........................................................................D-22
CSPAR0 and CSPAR1 Pin Assignment Field Encoding ..............................D-22
Block Size Encoding ....................................................................................D-23
Option Register Function Summary .............................................................D-24
QSM Address Map .......................................................................................D-25
PQSPAR Pin Assignments ..........................................................................D-31
Effect of DDRQS on PORTQS Pins .............................................................D-31
Effect of DDRQS on QSM Pin Function .......................................................D-32
MC68331 Module Address Map ...................................................................D-37
Register Bit and Field Mnemonics ...............................................................D-40
7-3
A-1
A-2
A-2
A-3
A-4
A-4
A-5
A-5
A-6
A-6
A-7
A-8
A-8
A-9
B-1
B-2
C-1
D-1
D-2
D-3
D-4
D-5
D-6
D-7
D-8
D-9
D-10
D-11
D-12
D-13
D-14
D-15
D-16
D-17
D-18
MOTOROLA
xiv
MC68331
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
