Order this document by AM26LS32/D
QUAD EIA-422/423 Line
Receiver with Three-State
Outputs
Motorola′s Quad EIA–422/3 Receiver features four independent receiver
chains which comply with EIA Standards for the Electrical Characteristics of
Balanced/Unbalanced Voltage Digital Interface Circuits. Receiver outputs
are 74LS compatible, three–state structures which are forced to a high
impedance state when Pin 4 is a Logic “0” and Pin 12 is a Logic “1.” A PNP
device buffers each output control pin to assure minimum loading for either
Logic “1” or Logic “0” inputs. In addition, each receiver chain has internal
hysteresis circuitry to improve noise margin and discourage output instability
for slowly changing input waveforms. A summary of AM26LS32 features
include:
•
Four Independent Receiver Chains
AM26LS32
QUAD EIA–422/3 LINE
RECEIVER WITH
THREE–STATE OUTPUTS
SEMICONDUCTOR
TECHNICAL DATA
•
•
•
•
•
•
•
•
Three–State Outputs
High Impedance Output Control Inputs
(PIA Compatible)
Internal Hysteresis – 30 mV (Typical) @ Zero Volts Common Mode
Fast Propagation Times – 25 ns (Typical)
TTL Compatible
Single 5.0 V Supply Voltage
Fail–Safe Input–Output Relationship. Output Always High When Inputs
Are Open, Terminated or Shorted
6.0 k Minimum Input Impedance
D SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16)
PC SUFFIX
PLASTIC PACKAGE
CASE 648
PIN CONNECTIONS
Representative Block Diagram
Three–State
Control
Inputs
1
–
+
–
+
16
VCC
15
Inputs A
2
Inputs B
14
13
Output B
12
Differential
Inputs
Outputs A
3
Output
3–State
Control
4
Output C
5
6
3–State
Control
Input
Network
Inputs C
7
+
–
+
–
11
Output D
10
Inputs D
9
GND
8
Amplifier
Hysteresis
Level
Translator
ORDERING INFORMATION
Level
Translator
Amplifier
Device
AM26LS32PC
MC26LS32D*
* Note that the surface mount MC26LS32D device uses the same die as in the plastic DIP
*
AM26LS32DC device, but with an MC prefix to prevent confusion with the package suffix.
©
Motorola, Inc. 1995
Operating
Temperature Range
TA = 0 to 70°C
Package
Plastic DIP
SO–16
MOTOROLA ANALOG IC DEVICE DATA
1