V58C365164S
The extended mode register stores the data for enabling or disabling DLL. The default value of the extend-
ed mode register is not defined, therefore the extended mode register must be written after power up for en-
abling or disabling DLL. The extended mode register is written by asserting low on CS, RAS, CAS, WE and
high on BA
0
(The DDR SDRAM should be in all bank precharge with CKE already high prior to writing into
the extended mode register). The state of address pins A
0
~ A
11
and BA
1
in the same cycle as CS, RAS,
CAS and WE low is written in the extended mode register. Two clock cycles are required to complete the
write operation in the extended mode register. The mode register contents can be changed using the same
command and clock cycle requirements during operation as long as all banks are in the idle state. A
0
is used
for DLL enable or disable. “High” on BA
0
is used for EMRS. All the other address pins except A
0
and BA
0
must be set to low for proper EMRS operation. A
1
is used at EMRS to indicate I/O strength A
1
= 0 full strength,
A
1
= 1 half strength. Refer to the table for specific codes.
CILETIV LESO M
Functional Description
■
Power-Up Sequence
The following sequence is required for POWER UP.
1. Apply power and attempt to maintain CKE at a low state (all other inputs may be undefined.)
- Apply VDD before or at the same time as VDDQ.
- Apply VDDQ before or at the same time as VTT & Vref.
2. Start clock and maintain stable condition for a minimum of 200us.
3. The minimum of 200us after stable power and clock (CLK, CLK), apply NOP & take CKE high.
4. Precharge all banks.
5. Issue EMRS to enable DLL.(To issue “DLL Enable” command, provide “Low” to A0, “High” to BA0
and “Low” to all of the rest address pins, A1~A11 and BA1)
6. Issue a mode register set command for “DLL reset”. The additional 200 cycles of clock input is
required to lock the DLL. (To issue DLL reset command, provide “High” to A8 and “Low” to BA0)
7. Issue precharge commands for all banks of the device.
8. Issue 2 or more auto-refresh commands.
9. Issue a mode register set command to initialize device operation.
Note1 Every “DLL enable” command resets DLL. Therefore sequence 6 can be skipped during power up. Instead of it,
the additional 200 cycles of clock input is required to lock the DLL after enabling DLL.
Power up Sequence & Auto Refresh(CBR)
0
CK, CK
••
••
2 Clock min.
2 Clock min.
EMRS
MRS
DLL Reset
precharge
ALL Banks
1
2
3
4
5
6
7
8
9
10
••
11
12
13
14
••
15
16
17
18
19
t
RP
1st Auto
Refresh
t
RFC
••
••
2nd Auto
Refresh
t
RFC
••
••
2 Clock min.
Mode
Register Set
Any
Command
Command
200
µS
Power up
to 1st command
precharge
ALL Banks
min. 200 Cycle
4
5
6
7
8
8
Extended Mode Register Set (EMRS)
V58C365164S Rev. 1.7 March 2002
5
MOSEL [ MOSEL VITELIC, CORP ]
