V58C2256(804/404/164)S
Block Diagram
Column Addresses
Column decoder
Sense amplifier & I(O) bus
Column decoder
Sense amplifier & I(O) bus
Column decoder
Sense amplifier & I(O) bus
Bank 0
Bank 1
Bank 2
Column decoder
Sense amplifier & I(O) bus
CKE
RAS
CK, CK
DLL
Strobe
Gen.
Data Strobe
DQS
V58C2256(804/404/164)S Rev. 1.4 October 2002
5
QFC
CAS
WE
DM
CK
CK
CS
CILETIV LESO M
32M x 8
Row Addresses
A0 - A12, BA0, BA1
A0 - A9, AP, BA0, BA1
Column address
counter
Column address
buffer
Row address
buffer
Refresh Counter
Row decoder
Memory array
Row decoder
Memory array
Row decoder
Memory array
Row decoder
Memory array
Bank 3
8192 x 512
x 16 bit
8192 x 512
x 16 bit
8192 x 512
x 16bit
8192 x 512
x 16bit
Input buffer
Output buffer
Control logic & timing generator
DQ
0
-DQ
7
MOSEL [ MOSEL VITELIC, CORP ]
