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V54C3256164VBUC 参数 Datasheet PDF下载

V54C3256164VBUC图片预览
型号: V54C3256164VBUC
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的256Mbit SDRAM 3.3伏,54球BGA SOC 54引脚TSOPII 16M ×16 [LOW POWER 256Mbit SDRAM 3.3 VOLT, 54-BALL SOC BGA 54-PIN TSOPII 16M X 16]
分类和应用: 动态存储器
文件页数/大小: 45 页 / 637 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
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V54C3256164VBUC/T  
AC Characteristics (Cont’d)  
Limit Values  
-7PC -7  
-8PC  
-6  
#
Symbol Parameter  
Min. Max. Min. Max. Min. Max. Min. Max. Unit Note  
Read Cycle  
21  
22  
23  
24  
tOH  
tLZ  
Data Out Hold Time  
3
1
3
6
2
3
1
3
7
2
3
1
3
7
2
3
0
3
8
2
ns  
ns  
2
7
Data Out to Low Impedance Time  
Data Out to High Impedance Time  
DQM Data Out Disable Latency  
tHZ  
ns  
tDQZ  
CLK  
Write Cycle  
25  
26  
tWR  
Write Recovery Time  
2
0
2
0
2
0
2
0
CLK  
CLK  
tDQW  
DQM Write Mask Latency  
Notes for AC Parameters:  
1. For proper power-up see the operation section of this data sheet.  
2. AC timing tests have V = 0.8V and V = 2.0V with the timing referenced to the 1.4 V crossover point. The transition  
IL  
IH  
time is measured between V and V . All AC measurements assume t = 1ns with the AC output load circuit shown  
IH  
IL  
T
in Figure 1.  
tCK  
VIH  
VIL  
CLK  
+ 1.4 V  
t
T
tCS  
tCH  
50 Ohm  
1.4V  
COMMAND  
Z=50 Ohm  
I/O  
tAC  
tAC  
tLZ  
50 pF  
tOH  
1.4V  
OUTPUT  
tHZ  
Figure 1.  
4. If clock rising time is longer than 1 ns, a time (t /2 – 0.5) ns has to be added to this parameter.  
T
5. If t is longer than 1 ns, a time (t – 1) ns has to be added to this parameter.  
T
T
6. These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as  
follows:  
the number of clock cycle = specified value of timing period (counted in fractions as a whole number)  
Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.  
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command  
is registered.  
7. Referenced to the time which the output achieves the open circuit condition, not to output voltage levels  
V54C3256164VBUC/T Rev. 1.1 February 2003  
13