V54C3128(16/80/40)4V(BGA)
V 54
MOSEL-VITELIC
MANUFACTURED
SYCHRONOUS
DRAM FAMILY
C = CMOS PROCESS
3.3V, LVTTL, INTERFACE
B = WBGA
DEVICE
NUMBER
V = LVTTL
SPECIAL FEATURE
COMPONENT REV. LEVEL
8Mbit x 16: 128164
16Mbit x 8: 128804
32Mbit x 4: 128404
PKG.
CILETIV LESOM
Description
WBGA
Pkg.
B
Pin Count
60
C
3
128404
V
B
SPEED
6 ns
7 ns
8 ns
60 Pin WBGA PIN CONFIGURATION
Top View
9 8 7
A
B
C
D
E
F
G
H
J
K
L
M
3 2 1
9
VCCQ
DQ1
DQ3
DQ5
DQ7
NC
8
DQ0
VSSQ
VCCQ
VSSQ
NC
VCC
CAS
CS
BA0
A10/AP
A1
A3
7
VCC
DQ2
DQ4
DQ6
NC
LDQM
WE
RAS
BA1
A0
A2
VCC
x16
A
B
C
D
E
F
G
H
J
K
L
M
3
VSS
DQ13
DQ11
DQ9
NC
UDQM
NC
CKE
A9
A7
A5
VSS
2
DQ15
VCCQ
VSSQ
VCCQ
NC
VSS
CLK
A12
A11
A8
A6
A4
1
VSSQ
DQ14
DQ12
DQ10
DQ8
Vref
9
VCCQ
NC
NC
NC
NC
NC
8
DQ1
VSSQ
VCCQ
VSSQ
NC
VCC
CAS
CS
BA0
A10/AP
A1
A3
7
VCC
DQ1
DQ2
DQ3
NC
NC
WE
RAS
BA1
A0
A2
VCC
x8
A
B
C
D
E
F
G
H
J
K
L
M
3
VSS
DQ6
DQ5
DQ4
NC
DQM
NC
CKE
A9
A7
A5
VSS
2
DQ7
VCCQ
VSSQ
VCCQ
NC
VSS
CLK
A12
A11
A8
A6
A4
1
VSSQ
NC
NC
NC
NC
Vref
9
VCCQ
NC
NC
NC
NC
NC
8
NC
VSSQ
VCCQ
VSSQ
NC
VCC
CAS
CS
BA0
A10/AP
A1
A3
7
VCC
DQ0
NC
DQ1
NC
NC
WE
RAS
BA1
A0
A2
VCC
x4
A
B
C
D
E
F
G
H
J
K
L
M
3
VSS
DQ3
NC
DQ2
NC
DQM
NC
CKE
A9
A7
A5
VSS
2
NC
VCCQ
VSSQ
VCCQ
NC
VSS
CLK
A12
A11
A8
A6
A4
1
VSSQ
NC
NC
NC
NC
Vref
V54C3128(16/80/40)4V(BGA) Rev. 1.2 September 2001
2
MOSEL [ MOSEL VITELIC, CORP ]
