MOSEL VITELIC
V54C3128804VAT
AC Characteristics 1,2, 3
T = 0 to 70 °C; V = 0 V; V = 3.3 V 0.3 V, t = 1 ns
A
SS
DD
T
Limit Values
-7
-8PC
-7PC
#
Symbol Parameter
Min. Max. Min. Max. Min. Max. Unit Note
Clock and Clock Enable
1
2
3
t
t
t
Clock Cycle Time
CAS Latency = 3
CAS Latency = 2
s
ns
ns
CK
CK
AC
CH
7
7.5
–
–
7
10
–
–
8
10
–
–
Clock Frequency
CAS Latency = 3
CAS Latency = 2
–
–
143
133
–
–
143
100
–
–
125
100
MHz
MHz
Access Time from Clock
CAS Latency = 3
CAS Latency = 2
2, 4
–
_
5.4
5.4
–
_
5.4
6
–
_
6
6
ns
ns
4
5
6
t
Clock High Pulse Width
Clock Low Pulse Width
Transition Tim
2.5
2.5
0.3
–
–
2.5
2.5
0.3
–
–
3
3
–
–
ns
ns
ns
t
CL
t
1.2
1.2
0.5
10
T
Setup and Hold Times
7
8
t
Input Setup Time
1.5
0.8
1.5
0.8
14
0
–
–
–
–
–
7
1.5
0.8
1.5
0.8
14
0
–
–
–
–
–
7
2
1
–
–
–
–
–
8
ns
ns
ns
ns
ns
ns
5
5
5
5
IS
t
Input Hold Time
IH
9
t
Input Setup Time
2
CKS
CKH
RSC
10
11
12
t
t
CKE Hold Time
1
Mode Register Set-up Time
Power Down Mode Entry Time
16
0
t
SB
Common Parameters
13
14
15
16
17
18
t
Row to Column Delay Time
Row Precharge Time
Row Active Time
15
15
42
60
14
1
–
15
15
42
60
14
1
–
20
20
45
60
16
1
–
–
ns
ns
6
6
6
6
6
RCD
t
–
–
RP
RAS
t
100K
100K
100k
–
ns
t
Row Cycle Time
–
–
–
–
–
–
ns
RC
t
t
Activate(a) to Activate(b) Command Period
CAS(a) to CAS(b) Command Period
–
ns
RRD
CCD
–
CLK
Refresh Cycle
19
20
t
Refresh Period (4096 cycles)
Self Refresh Exit Time
—
64
—
64
—
64
ms
REF
t
1
—
1
—
1
—
CLK
SREX
V54C3128804VAT Rev. 1.4 November 2000
11