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V53C16258SHK30 参数 Datasheet PDF下载

V53C16258SHK30图片预览
型号: V53C16258SHK30
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能256K ×16 EDO页模式的CMOS动态RAM可选自刷新 [HIGH PERFORMANCE 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH]
分类和应用:
文件页数/大小: 20 页 / 560 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
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MO SEL VITELIC  
V53C16258H  
AC Characteristics  
T = 0°C to 70°C, V = 5 V ± 10%, V = 0V unless otherwise noted  
A
CC  
SS  
AC Test conditions, input pulse levels 0 to 3V  
25  
(100 MHz)  
30  
35  
40  
45  
50  
#
Symbol Parameter  
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit Notes  
1
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RAS Pulse Width  
25 75K 30 75K 35 75K 40 75K 45 75K 50 75K ns  
RAS  
RC  
2
Read or Write Cycle Time  
RAS Precharge Time  
45  
15  
25  
4
60  
70  
25  
35  
6
75  
25  
40  
7
80  
25  
45  
8
90  
30  
50  
9
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
3
20  
30  
5
RP  
4
CAS Hold Time  
CSH  
CAS  
RCD  
RCS  
ASR  
RAH  
ASC  
CAH  
RSH (R)  
CRP  
RCH  
5
CAS Pulse Width  
6
RAS to CAS Delay  
10  
0
17  
12 20 13 24 15 28 18 32 19 36  
4
7
Read Command Setup Time  
Row Address Setup Time  
Row Address Hold Time  
Column Address Setup Time  
Column Address Hold Time  
RAS Hold Time (Read Cycle)  
CAS to RAS Precharge Time  
0
0
5
0
5
9
5
0
0
0
0
0
0
0
0
0
8
0
9
4
6
7
8
9
10  
11  
12  
13  
14  
0
0
0
0
0
4
5
5
6
7
7
10  
5
10  
5
10  
5
10  
5
5
Read Command Hold Time  
Referenced to CAS  
0
0
0
0
0
5
5
15  
16  
t
t
Read Command Hold Time  
Referenced to RAS  
0
4
0
6
0
7
0
8
0
9
0
ns  
ns  
ns  
RRH  
ROH  
RAS Hold Time Referenced  
to OE  
10  
17  
18  
19  
20  
t
t
t
t
Access Time from OE  
Access Time from CAS  
Access Time from RAS  
8
8
10  
10  
30  
16  
11  
11  
35  
18  
12  
12  
40  
20  
13  
13  
45  
22  
14  
14  
50  
24  
12  
OAC  
CAC  
RAC  
CAA  
ns 6, 7, 14  
ns 6, 8, 9  
ns 6, 7, 10  
25  
13  
Access Time from Column  
Address  
21  
22  
23  
t
t
t
OE or CAS to Low-Z Output  
OE or CAS to High-Z Output  
0
0
0
0
0
0
0
0
0
0
0
0
ns  
ns  
ns  
16  
16  
LZ  
5
5
6
6
7
8
HZ  
AR  
Column Address Hold Time  
from RAS  
19  
23  
25  
30  
35  
40  
24  
25  
26  
t
t
t
RAS to Column Address  
Delay Time  
8
7
5
13  
9
9
7
14 10 17 12 20 13 23 14 26  
ns  
ns  
ns  
11  
RAD  
RAS or CAS Hold Time in  
Write Cycle  
10  
8
10  
10  
10  
13  
10  
14  
RSH (W)  
CWL  
Write Command to CAS  
Lead Time  
27  
28  
t
t
Write Command Setup Time  
Write Command Hold Time  
0
4
0
5
0
5
0
5
0
6
0
7
ns 12, 13  
ns  
WCS  
WCH  
V53C16258H Rev. 3.8 November 1999  
5