MOSEL VITELIC
Serial Presence Detect Information
A serial presence detect storage device –
2
E PROM – is assembled onto the module. Informa-
tion about the module configuration, speed, etc. is
V43644R04VCTG-75
written into the E
2
PROM device during module pro-
duction using a serial presence detect protocol (I
2
C
synchronous 2-wire bus)
SPD-Table for PC133 modules:
Hex Value
Byte Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function Described
Number of SPD bytes
Total bytes in Serial PD
Memory Type
Number of Row Addresses (without BS bits)
Number of Column Addresses (for x16 SDRAM)
Number of DIMM Banks
Module Data Width
Module Data Width (continued)
Module Interface Levels
SDRAM Cycle Time at CL=3
SDRAM Access Time from Clock at CL=3
Dimm Config (Error Det/Corr.)
Refresh Rate/Type
SDRAM width, Primary
Error Checking SDRAM Data Width
Minimum Clock Delay from Back to Back Random
Column Address
Burst Length Supported
Number of SDRAM Banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module Attributes
SDRAM Device Attributes: General
Minimum Clock Cycle Time at CAS Latency = 2
Maximum Data Access Time from Clock for CL = 2
Minimum Clock Cycle Time at CL = 1
Maximum Data Access Time from Clock at CL = 1
Minimum Row Precharge Time
Minimum Row Active to Row Active Delay t
RRD
Minimum RAS to CAS Delay t
RCD
Minimum RAS Pulse Width t
RAS
SPD Entry Value
128
256
SDRAM
12
8
1
64
0
LVTTL
7.5 ns
5.4 ns
none
Self-Refresh, 15.6
µ
s
x16
n/a / x8
t
ccd
= 1 CLK
1, 2, 4, 8 & full Page
4
CL = 3
CS Latency = 0
WL = 0
Non Buffered/Non Reg.
Vcc tol
±
10%
Not Supported
Not Supported
Not Supported
Not Supported
20 ns
15 ns
20 ns
45 ns
4Mx64
80
08
04
0C
08
01
40
00
01
75
54
00
80
10
00
01
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
8F
04
04
01
01
00
0E
00
00
00
00
14
0F
14
2D
V43644R04VCTG-75 Rev. 1.1 September 2000
4
MOSEL [ MOSEL VITELIC, CORP ]
