MO SEL VITELIC
MSU2051/U2031
Timing Critical, Requirement of External Clock (Vss=0.0V is assumed)
T CLCL
Vdd-0.5V
70%Vdd
0.45V
20%Vdd-0.1V
T CHCX
T CLCX
T CHCL
T CLCH
Tm.I External Program Memory Read Cycle
T PLPH
#PSEN
ALE
T LHLL
T AVLL
T LLPL
T LLIV
T PLAZ
T PXIZ
T PXIX
T LLAX
T PLIV
PORT 0
PORT 2
A0 - A7
Instruction. IN
A0 - A7
T AVIV
A8 - A15
A8 - A15
Tm.II External Data Memory Read Cycle
#PSEN
T YHLH
ALE
T LLDV
T LLYL
T RLRH
#RD
T AVLL
T LLAX
T RHDZ
T RHDX
DATA IN
T RLDV
T RLAZ
A0-A7
from Ri or
A0-A7
From
INSTR.
IN
PORT 0
PORT 2
T AVYL
T AVDV
P2.0-P2.7 or A8-A15 from DPH
A8-A15 from PCH
Rev. 1.0 February 1998
12
MOSEL [ MOSEL VITELIC, CORP ]
