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MSM8512JLI-020 参数 Datasheet PDF下载

MSM8512JLI-020图片预览
型号: MSM8512JLI-020
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 512KX8, 20ns, CMOS, CQCC32, CERAMIC, LCC-32]
分类和应用: 静态存储器内存集成电路
文件页数/大小: 8 页 / 105 K
品牌: MOSAIC [ MOSAIC ]
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ISSUE 1.0 : January 1999
MSM8512 - 020/025/30
Read Cycle Timing Waveform
(1,2)
t
Address
RC
t
AA
OE
t
OE
t
OLZ
CS
t
OH
t
CLZ
t
ACS
t
CHZ(3)
t
OHZ(3)
D0~7
High-Z
Data Valid
Notes:
(1) During the Read Cycle, WE is high.
(2) Address valid prior to or coincident with CS transition Low.
(3) t
CHZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced
to output voltage levels. These parameters are sampled and not 100% tested.
Write Cycle No.1 Timing Waveform
t
WC
Address
OE
t
AS(3)
t
AW
t
CW(4)
(6)
t
WR
(2)
CS
t
WP(1)
WE
t
OHZ(3,9)
D0~7 out
High-Z
t
DW
t
OW
t
DH
D0~7 in
High-Z
4