欢迎访问ic37.com |
会员登录 免费注册
发布采购

MFM8516J-12 参数 Datasheet PDF下载

MFM8516J-12图片预览
型号: MFM8516J-12
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 512KX8, 120ns, CQCC32, CERAMIC, JLCC-32]
分类和应用: 内存集成电路
文件页数/大小: 25 页 / 237 K
品牌: MOSAIC [ MOSAIC ]
 浏览型号MFM8516J-12的Datasheet PDF文件第15页浏览型号MFM8516J-12的Datasheet PDF文件第16页浏览型号MFM8516J-12的Datasheet PDF文件第17页浏览型号MFM8516J-12的Datasheet PDF文件第18页浏览型号MFM8516J-12的Datasheet PDF文件第20页浏览型号MFM8516J-12的Datasheet PDF文件第21页浏览型号MFM8516J-12的Datasheet PDF文件第22页浏览型号MFM8516J-12的Datasheet PDF文件第23页  
MFM8516 - 70/90/12/15  
ISSUE 4.7 : NOVEMBER 1998  
Operating Modes  
The following modes are used to control the device.  
OPERATION  
CS  
L
OE  
L
WE  
H
A0  
A0  
X
A1  
A1  
X
A6  
A6  
X
A9  
A9  
X
I /O  
DOUT  
Read(1)  
Standby  
H
L
X
X
High Z  
High Z  
Din  
Output Disable  
H
H
L
H
X
X
X
X
Write  
L
L
A0  
L
A1  
H
A6  
L
A9  
VID  
VID  
Verify Sector Protect  
Auto-Select Device Unprotected Code  
L
H
Code  
Code  
L
L
H
H
H
L
1) L=VIL, H=VIH, X=Don't Care  
NOTE:  
1) WE can be VIL if OE is VIL , OE at VIH initiates write operation.  
D7 Data Polling  
The MFM8516 features Data Polling as a method to indicate to the host system that the Embedded Algo-  
rithms are in progress or completed. During the Embedded Programming Algorithm, an attempt to read the  
device will produce complement data of the data last written to D7. Upon completion of the Embedded Pro-  
gramming Algorithm an attempt to read the device will produce the true data last written to D7. During the  
Embedded Erase Algorithm, During the Embedded Erase Algorithm, an attempt to read the device will pro-  
duce a "0" at the D7 output.  
For chip erase, the Data Polling is valid after the rising edge of the six WE pulse in the six write pulse se-  
quence. For sector erase, the Data Polling is valid after the last rising edge of the sector erase WE pulse. Data  
Polling must be performed at sector address within any of the sectors being erased or not a protected sector.  
Otherwise, the status may not be valid. Once the Embedded Algorithm operation is close to being completed,  
the device data pins (D7) may change asynchronously while OE is asserted low. This means that the device is  
driving status information on D7 at one instant of time and then that byte's valid data at the next instant of time.  
Depending on when the system samples the D7 output, it may read the status or valid data. Even if the device  
has completed the Embedded Algorithm operation and D7 has a valid data, the data outputs on D0-D6 may  
still be invalid. The valid data on D0-D7 will be read on the successive read attempts.  
The Data Polling feature is only active during the Embedded Programming Algorithm, Embedded Erase  
Algorithm, or sector erase time-out.  
19  
 复制成功!