MFM8126S-70/90/12
ISSUE4.2:November1998
Sector Erase
Sector erase is a six bus cycle operation. There are two "unlock"write cycles. These are followed by writing the
"Set-up" command. Two more "unlock" write cycles are then followed by the sector erase command. The sector
address (any address location within the desired sector) is latched on the falling edge of WE, while the com-
mand (data) is latched on the rising edge of WE. A time-out of 80µs from the rising edge of the last sector erase
command will initiate the sector erase command(s).
Multiple sectors may be erased concurrently by writing the six bus cycle operations as desribed above. This
sequence is followed with writes of the sector erase command (30H) to addresses in other sectors required to
be concurrently erased. The time between writes must be less than 80µs, otherwise that command will not be
accepted. It is recommended that processor interrupts be disabled during this time to guarantee this condition.
The interrupts can be re-enabled after the last Sector Erase command(s). If another falling edge of WE occurs
within the 80µs time-out window , the timer is reset.(D3 indicates if the timer window is still open). Loading the
sector erase buffer may be done in any sequence and with any number of sectors (0 to 7). Any command other
than Sector Erase during this period will reset the device to read mode, ignoring the previous.
Sector erase doesn't require the user to program the device prior to erase. The device automatically programs all
memory locations in the sector(s) to be erased prior to electrical erase. When erasing a sector or sectors the
remaining unselected sectors are not affected. The system is not required to provide any controls or timings
duringtheseoperations.
The automatic sector erase begins after the 100µs time-out from the rising edge of the WE pulse for the last
sector erase command pulse and terminates when the data on D7 is "1" ( see Write Operation Status Section)
at which time the device returns to read mode. Data polling must be preformed at an address within any of the
sectors being erased.
Write Operations Status
Hardware Sequence Flags
STATUS
D7
D6
D5
D3
D2-D0
Auto-Programming
InProgress Programminginautoerase
D7
Toggle
Toggle
0
0
0
1
0
Reservedfor
futureuse
Erasing in Auto Erase
Auto-Programming
0
Toggle
Toggle
0
1
1
0
D7
Exceeded Programminginautoerase
Time limits Erasing in Auto-Erase
0
0
Toggle
Toggle
1
1
1
1
Reservedfor
futureuse
Data Polling - D7
The MFM8126 features Data Polling as a method to indicate to the host system that the Embedded Algorithms
are in progress or completed.
During the Embedded Programming Algorithm, an attempt to read the device will produce complement data of
the data last written to D7. Upon completion of the Embedded Programming Algorithm an attempt to read the
device will produce the true data last written to D7. Data Polling is valid after the rising edge of the forth WE
pulse in the four write pulse sequence.
During the Embedded Erase Algorithm, D7 will be "0" until the erase operation is completed. Upon completion
data at D7 is "1". For chip erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six
write pulse sequence. For sector erase, Data Polling is valid after the last rising edge of the sector erase WE
pulse.
The Data Polling feature is only active during the Embedded Programming Algorithm, Embedded Erase
Algorithm, or sector erase time-out.
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MOSAIC [ MOSAIC ]
