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MFM8126W-70E 参数 Datasheet PDF下载

MFM8126W-70E图片预览
型号: MFM8126W-70E
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 128KX8, 70ns, CQCC32, CERAMIC, LCC-32]
分类和应用: 内存集成电路
文件页数/大小: 27 页 / 326 K
品牌: MOSAIC [ MOSAIC ]
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MFM8126S-70/90/12  
ISSUE4.2:November1998  
CommandDefinitions  
Device operations are selected by writing specific address and data sequences into the command register. The  
following table defines these register command sequences.  
Bus  
First Bus  
Second Bus Third bus  
Fourth bus  
Fifth Bus  
Sixth Bus  
Write Write Cycle Write Cycle Write Cycle Read/Write  
Write Cycle Write Cycle  
COMMAND  
SEQUENCE  
Cycle  
Req'd  
Cycle  
Addr Data Addr Data Addr Data Addr Data Addr Data Addr  
Data  
Read/Reset  
4
5555H  
AAH 2AAAH  
55H  
5555H  
F0H  
RA  
RD  
Autoselect  
4
4
5555H  
5555H  
AAH 2AAAH  
AAH 2AAAH  
55H  
55H  
5555H  
5555H  
90H 00H/01H 01H/20H  
Byte Program  
A0H  
PA  
PD  
Chip erase  
6
6
5555H  
5555H  
AAH 2AAAH  
AAH 2AAAH  
55H  
55H  
5555H  
5555H  
80H  
80H  
5555H  
5555H  
AAH 2AAAH  
AAH 2AAAH  
55H  
55H  
5555H  
SA  
10H  
30H  
Sector erase  
NOTES:  
1. Address bit A15=X=Don't care. Write Sequences may be initiated with A15 in either state.  
2. Address bit A16=X=Don't care for all address commands except for Program Address (PA) and Sector  
Address (SA).  
3. RA=Address of the memory location to be read.  
PA=Address of memory location to be programmed. Addresses are latched on the falling edge of the WE  
pulse.  
SA=Address of the sector to be erased. The combination of A16, A15 and A14 will uniquely select any  
sector.  
4. RD=DatareadfromlocationRAduringreadoperation.  
PD=Data to be programmed at location PA. Data is latched on the falling edge of WE  
Read/Reset Command  
The read or reset operation is initiated by writing the read/reset command sequence into the command  
register. Microprocessor read cycles retrieve array data from the memory. The device remains enabled for  
reads until the command register contents are altered.  
The device will automatically power-up in the read/reset state. In this case, a command sequence is not  
required to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures  
that no spurious alteration of memory content occurs during the power transition. Refer to the AC Read Char-  
acteristics and Waveforms for specific timing parameters.  
11