System Reset PST573
MITSUMI
Timing Chart
7
6
5
4
3
2
1
0
VCC
VS
VCC/VOUT
VOUT
(V)
VS (CPU)
Time
Undefined
RESET
ON
OFF
Application circuits
1. Normal hard reset
Delay time (tpLH)
VCC-0.2
Vscpu
.
= CL RL
.
ln
[
+0.025 (mS)
]
CL: µF
Reset threshold voltage of
CPU, MPU, etc.
RL : kΩ
Vs cpu :
Voltage: V
Note: Connect a capacitor between IC pins 1 and 2
if VCC line impedance is high.
2. Manual reset added
Note 1: Use RL, CL and Rm to prevent manual switch
chattering.
Note that Rm should be set to the following
conditions.
<
Rm 1/20RL
=
Note 2: Connect a capacitor between IC pins 1 and 2
if VCC line impedance is high.
3. Battery checker (LED ON for high voltage)
Note: Connect a capacitor between IC pins 1 and 2 if
VCC line impedance is high.
MITSUMI [ MITSUMI ELECTRONICS, CORP. ]
