No-adjustment Sync Separator MM1068
MITSUMI
Application Circuits
There is a momentary phase lag in the H. SYNC output vertical feedback interval. When using this IC for OSD
timing, characters at the top of the screen may bend due to IC deviation. If this happens, change the
resistance between Pins 13 and 14 as shown, and the bending will improve by several H from the top edge of
the screen.
Application Circuit 1
Application Circuit 2
Note 1 : 1. 1
Note 2 :
NTSC
CSB503F2
1.5kΩ
PAL
CSB500F40
1.8kΩ
*
1. 2 Input signal sync tip must be less than
*
X
1V for application circuit 1 Pin 7
external circuit.
R1
R2
C1
C2
390Ω
220pF
3300pF
2. The above 1. does not apply for
application circuit 2 Pin 7 external circuit.
Pin 1 is clamped at approximately 2.5V.
2. Resistors R1 and R2 should have precision of 1ꢀ.
3. Capacitors C1 and C2 should have precision of
5ꢀ and temperature characteristic of CH class.
MITSUMI [ MITSUMI ELECTRONICS, CORP. ]
