MITSUBISHI MICROCOMPUTERS
3827 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 20 Timing requirements 1 (VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85°C, unless otherwise noted)
Limits
Typ.
Symbol
Parameter
Unit
Min.
2
Max.
tw(RESET)
tc(XIN)
Reset input “L” pulse width
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Main clock input cycle time (XIN input)
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR0, CNTR1 input cycle time
CNTR0, CNTR1 input “H” pulse width
CNTR0, CNTR1 input “L” pulse width
INT0 to INT2 input “H” pulse width
INT0 to INT2 input “L” pulse width
125
45
twH(XIN)
twL(XIN)
40
tc(CNTR)
twH(CNTR)
twL(CNTR)
twH(INT)
twL(INT)
250
105
105
80
80
tc(SCLK1)
twH(SCLK1)
twL(SCLK1)
Serial I/O1 clock input cycle time (Note)
Serial I/O1 clock input “H” pulse width (Note)
Serial I/O1 clock input “L” pulse width (Note)
Serial I/O1 input set up time
800
370
370
220
100
1000
400
400
200
200
t
su(RXD–SCLK1)
th(SCLK1–RXD) Serial I/O1 input hold time
tc(SCLK2)
Serial I/O2 clock input cycle time (Note)
twH(SCLK2)
twL(SCLK2)
Serial I/O2 clock input “H” pulse width (Note)
Serial I/O2 clock input “L” pulse width (Note)
Serial I/O2 input set up time
t
su(SIN2–SCLK2)
th(SCLK2–SIN2) Serial I/O2 input hold time
Note: When bit 6 of address 001A16 is “1”.
Divide this value by four when bit 6 of address 001A16 is “0”.
Table 21 Timing requirements 2 (VCC = 2.2 to 4.0 V, VSS = 0 V, Ta = –20 to 85°C, unless otherwise noted)
Limits
Symbol
Parameter
Unit
Min.
Typ.
Max.
tw(RESET)
tc(XIN)
2
Reset input “L” pulse width
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
125
Main clock input cycle time (XIN input)
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR0, CNTR1 input cycle time
CNTR0, CNTR1 input “H” pulse width
CNTR0, CNTR1 input “L” pulse width
INT0 to INT2 input “H” pulse width
INT0 to INT2 input “L” pulse width
twH(XIN)
twL(XIN)
45
40
900/(VCC–0.4)
tc(CNTR)/2–20
tc(CNTR)/2–20
230
tc(CNTR)
twH(CNTR)
twL(CNTR)
twH(INT)
twL(INT)
tc(SCLK1)
230
2000
Serial I/O1 clock input cycle time (Note)
twH(SCLK1)
twL(SCLK1)
950
Serial I/O1 clock input “H” pulse width (Note)
Serial I/O1 clock input “L” pulse width (Note)
ns
ns
950
t
su(R
X
D–SCLK1
)
Serial I/O1 input set up time
400
ns
ns
ns
ns
ns
ns
ns
th(SCLK1–RXD) Serial I/O1 input hold time
200
tc(SCLK2)
Serial I/O2 clock input cycle time (Note)
2000
twH(SCLK2)
twL(SCLK2)
Serial I/O2 clock input “H” pulse width (Note)
Serial I/O2 clock input “L” pulse width (Note)
Serial I/O2 input set up time
950
950
t
su(SIN2–SCLK2
)
400
th(SCLK2–SIN2) Serial I/O2 input hold time
300
Note: When bit 6 of address 001A16 is “1”.
Divide this value by four when bit 6 of address 001A16 is “0”.
56
MITSUBISHI [ Mitsubishi Group ]
