SA828
PWM SIGNAL
BEFORE
PULSE DELETION
>t
pd
<t
pd
PWM SIGNAL
AFTER
PULSE DELETION
>t
pd
>t
pd
>t
pd
>t
pd
>t
pd
<t
pd
>t
pd
>t
pd
PULSE
DELETED
PULSE
DELETED
t
pd
= PULSE DELETION TIME
Fig. 10 The effect of the pulse deletion circuit
Control Register Programming
The control register should only be programmed once the
initialisation register contains the basic operating parameters of
the SA828.
As with the initialisation register, control register data is
loaded into the three 8-bit temporary registers R0 - R2. When all
the data has been loaded into these registers it is transferred
into the 24-bit control register by writing to the dummy register
R3. It is recommended that all three temporary registers are
updated before writing to R3 in order to ensure that a conformal
set of data is transferred to the control register for execution.
PFS
7
PFS
6
PFS
5
PFS
4
PFS
3
PFS
2
PFS
1
PFS
0
Output inhibit selection
When active (i.e., Iow) the output inhibit bit INH sets all the
PWM outputs to the off (low) state. No other internal operation
of the device is affected. When the inhibit is released the PWM
outputs continue immediately. Note that as the inhibit is asserted
after the pulse deletion and pulse delay circuits, pulses shorter
than the normal minimum pulse width may be produced initially.
Overmodulation selection
The overmodulation bit OM is, in effect, the ninth bit (MSB)
of the amplitude word. When active (i.e., high) the output
waveform will be controlled in the 100% to 200% range by the
amplitude word.
The percentage amplitude control is now given by:
Overmodulated Amplitude =
A
POWER
+ 100%
where
A
POWER
= the power amplitude
V
POWER
FREQUENCY
SELECT WORD
BITS 0-7
PFS0
=
LSB
Fig. 11 Temporary register R0
F/R
OM
INH
X
DON’T
CARE
PFS
11
PFS
10
PFS
9
PFS
8
0
t
OVERMOD-
ULATION
BIT
0
=
DISABLED
1
=
ACTIVE
FORWARD/
REVERSE BIT
0
=
FORWARD
1
=
REVERSE
POWER
FREQUENCY
SELECT WORD
BITS 8-11
PFS11
=
MSB
V
OVERMODULATION BIT NOT SET
(100% MODULATION)
OUTPUT
INHIBIT BIT
0
=
OUTPUTS DISABLED
1
=
OUTPUTS ACTIVE
0
t
Fig. 12 Temporary register R1
Power frequency selection
The power frequency is selected as a proportion of the power
frequency range (defined in the initialisation register) by the 12-
bit power frequency select word, PFS, allowing the power
frequency to be defined in 4096 equal steps. As the PFS word
spans the two temporary registers R0 and R1 it is therefore
essential, when changing the power frequency, that both these
registers are updated before writing to R3.
The power frequency (f
POWER
) is given by:
f
RANGE
x
pfs
4096
where
pfs
= decimal value of the 12-bit PFS word and
f
RANGE
=
power frequency range set in the initialisation register.
f
POWER
=
OVERMODULATION BIT SET
(200% MODULATION)
Fig. 13 Current waveforms as seen at the motor terminals,
showing the effect of setting the overmodulation bit
Forward/ reverse selection
The phase sequence of the three-phase PWM output
waveforms is controlled by the Forward/Reverse bit F/R. The
actual effect of changing this bit from 0 (forward) to 1 (reverse)
is to reverse the power frequency phase counter from
incrementing the phase angle to decrementing it. The required
output waveforms are all continuous with time during a forward/
reverse change.
In the forward mode the output phase sequence is red-
yellow-blue and in the reverse mode the sequence is blue-
yellow-red.
7
MITEL [ MITEL NETWORKS CORPORATION ]
