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SA828 参数 Datasheet PDF下载

SA828图片预览
型号: SA828
PDF下载: 下载PDF文件 查看货源
内容描述: 三相PWM波形发生器 [Three-Phase PWM Waveform Generator]
分类和应用:
文件页数/大小: 14 页 / 208 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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SA828
The power frequency range is a function of the carrier
waveform frequency (f
CARR
) and a multiplication factor
m,
determined by the 3-bit FRS word. The value of
m
is determined
as shown in Table 5.
FRS word
Value of m
110
64
101
32
100
16
011
8
010
4
001
2
000
1
CR
PDT
6
PDT
5
PDT
4
PDT
3
PDT
2
PDT
1
PDT
0
COUNTER
RESET
Table 5 Values of carrier frequency multiplicaion factor m
The power frequency range,
f
RANGE
, is then given by:
f
f
RANGE
=
CARR
x
m
384
where
f
CARR
= carrier frequency and
m
= 1, 2, 4, 8, 16, 32 or 64
(as set by FRS).
X
X
PDY
5
PDY
4
PDY
3
PDY
2
PDY
1
PDY
0
DON’T
CARE
PULSE
DELAY
SELECT WORD
PDY
5
=
MSB
PDY
0
=
LSB
Fig. 9 Temporary register R0
Pulse deletion time
To eliminate short pulses the true PWM pulse train is passed
through a pulse deletion circuit. The pulse deletion circuit
compares pulse widths with the pulse deletion time set in the
initialisation register. lf a pulse (either positive or negative) is
greater than or equal in duration to the pulse deletion time, it is
passed through unaltered, otherwise the pulse is deleted.
The pulse deletion time,
t
pd
, is a function of the carrier wave
frequency and
pdt,
defined by the 7-bit pulse deletion time word
(PDT). The value of
pdt
is selected as shown in Table 7.
PDT word
Value of pdt
1111111 1111110
1
2
...etc...
...etc...
0000000
128
Fig. 7 Temporary register R2
Pulse delay time
The pulse delay time affects all six PWM outputs by delaying
the rising edges of each of the outputs by an equal amount.
The pulse delay time is a function of the carrier waveform
frequency and
pdy,
defined by the 6-bit pulse delay time select
word (PDY). The value of
pdy
is selected as shown in Table 6.
PDY word
Value of pdy
111111
1
111110
2
...etc...
...etc...
000000
64
The pulse deletion time,
t
pd
, is then given by:
pdt
t
pd
=
f
CARR
x 512
where
pdt
= 1-128 (as set by PDT) and
f
CARR
= carrier frequency.
Fig. 10 shows the effect of pulse deletion on a pure PWM
waveform.
Counter reset
When the CR bit is active (i.e., Iow) the internal power
frequency phase counter is set to 0 degrees for the red
phase. It will remain at 0 degrees until the CR bit is released
(i.e., high).
Table 6 Values of pdy
The pulse delay time,
t
pdy
, is then given by:
pdy
f
CARR
x 512
where
pdy
= 1- 64 (as set by PDY) and
f
CARR
= carrier
frequency.
Fig 8 shows the eftect of the pulse delay circuit.
It should be noted that as the pulse delay circuit follows the
pulse deletion circuit (see Fig. 2), the minimum pulse width
seen at the PWM outputs will be shorter than the pulse deletion
time set in the initialisation register. The actual shortest pulse
generated is given by
t
pd
t
pdy
.
t
pdy
=
PWM SIGNAL
REQUIRED AT
INVERTER OUTPUT
Control Register Function
This 24-bit register contains the parameters that would
normally be modified during PWM cycles in order to control
the operation of the motor.
The parameters set in the control register are as follows:
Power frequency (speed)
Allows the power frequency of the PWM outputs to be
adjusted within the range specified in the initialisation register
Forward/reverse
Allows the direction of rotation of the AC motor to be
changed by changing the phase sequence of the PWM
outputs.
Power frequency amplitude
By altering the widths of the PWM output pulses while
maintaining their relative widths, the amplitude of the power
waveform is effectively altered whilst maintaining the same
power frequency.
Overmodulation
Allows the output waveform amplitude to be doubled so
that a quasi-squarewave is produced. A combination of
overmodulation and a lower power frequency can be used to
achieve rapid braking in AC motors.
Output inhibit
Allows the outputs to be set to the low state while the PWM
generation continues internally. Useful for temporarily
inhibiting the outputs without having to to change other
register contents.
t
pdy
OUTPUT SIGNAL TO
DRIVE TOP SWITCH
INVERTER ARM
t
pdy
t
pdy
OUTPUT SIGNAL TO
DRIVE BOTTOM SWITCH
INVERTER ARM
t
pdy
t
pdy
=
PULSE DELAY TIME
Fig. 8 Effect of pulse delay on PWM pulse train
6
PULSE DELETION
TIME
SELECT WORD
PDT
6
=
MSB
PDT
0
=
LSB
Table 7 Values of pdt