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PDSP16515GCPR 参数 Datasheet PDF下载

PDSP16515GCPR图片预览
型号: PDSP16515GCPR
PDF下载: 下载PDF文件 查看货源
内容描述: 单机FFT处理器 [Stand Alone FFT Processor]
分类和应用:
文件页数/大小: 27 页 / 292 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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PDSP16515A  
When continuously transforming data such that new outputs  
are internally available before the previous block has been  
completelydumped, thenDAVwouldnormallystayactiveand  
give no indication that one block dump had been finished and  
another block started. Additional internal circuitry is, however,  
provided to ensure that DAV goes inactive for one DOS high  
time, thus supplying an inter block marker.  
previous results have been dumped. Such a system needs no  
input buffer, and INEN can be permanently tied low if the edge  
activated mode is not in use. If the loss of data is to be avoided  
an input buffer is needed and the host must have received all  
theresultsbeforeanewblockofdatahasbeenloadedintothe  
buffer.  
For 256 point transforms, with host controlled dumping, it is  
still possible to overlap load and dump operations. The  
maximum dump times, however, must be less than the load  
times to avoid data corruption. Previously converted outputs  
will be actually corrupted, rather than inputs simply not being  
used.  
Asynchronous Dav Mode  
If DEN is not active in a single device when the transform is  
complete, then the device will wait for DEN to go active before  
any data is dumped. This mode is suitable for applications in  
which output processing is under the control of a remote host,  
such as a general purpose digital signal processor. The DAV  
output will then go active as soon as the output buffer is full,  
and will not be synchronised to the DOS edge. In such  
systems the DOS strobe may not necessarily be present at  
this time. Table 3 gives the relevant timing information.  
If the loss of incoming data is not important, the device can be  
forced to do separate load, transform, and then dump  
operations. The corruption of results will then never occur, no  
matter what dump time is taken. This can be achieved by  
ensuring that INEN is not active between loading a block of  
data and completing the dump of the results from that data.  
The same ends can be achieved if the INEN edge activated  
mode ( Bit 12 reset ) is used, and the inverted DAV edge is  
used to drive the INEN input. This then initializes a new load  
operation only when the previous dump has been completed.  
In this host controlled dump mode the PDSP16515A waits for  
the host to activate the DEN input after DAV has gone active.  
DEN then functions as an enable for the host produced data  
strobes on the DOS pin. DEN may either stay active for the  
complete transfer, or may be used to enable each DOS input.  
When DEN and DOS are both active an internal read  
operation occurs, and an address generator is incremented.  
DAV goes in-active in response to the DOS edge needed to  
readthelastoutput, unlessBit15intheControlRegisterisset.  
In this case DAV goes in-active when the next INEN edge is  
received for reasons given later.  
Results are transferred from the device with the rising edge of  
the DOS strobe when DEN is active. This is consistent with  
using the device in a data flow architecture, as is commonly  
employed in data processing systems. In a typical  
microprocessor based system, however, data is normally  
expected to become valid before the end of the data strobe  
produced by the processor. It is thus necessary for the user  
to provide a ‘dummy’ data strobe in order to transfer data to  
the outputs which can then be read by the host during the next  
data strobe. In addition further ' dummy ' strobes are needed  
each time DAV goes active in order to prime the output  
circuitry. The actual output sequence is given in Table 3 for a  
singledevicesystemandisdescribedmorefully in"usernotes  
- stopping DOS".  
In host controlled systems the time to dump data could be  
longer than the transform time. The dump time in such a  
system will dictate the maximum sampling rate that can be  
used without the loss of incoming data. In the 1024 point  
mode, when the loss of data is not important, the  
PDSP16515A is designed to not accept new data until the  
General Dump Considerations  
The tri-state drivers on the output buses are only enabled  
when both DAV and DEN are active. When DEN is tied  
permanently low the output bus will start to become valid from  
the DOS edge which also generates the DAV output. The next  
DOS edge can then be used to transfer the first output to the  
next device. When DEN is driven low in response to the DAV  
output, the outputs start to become valid when DEN goes low.  
TheScaleTagoutputsbecomevalidatthesametimeasdata,  
and when enabled will continue to indicate the correct value  
until all frequency bins have been dumped. If at any time  
during the dump operation DEN goes in- active, then both the  
data and scale tag outputs will go high impedance after the  
delay shown in Table 3.  
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