NWK933
64 TX_CLK
63 TX03
62 TXD2
61 TXD1
60 TXD0
59 RX_ER
58 RXD3
57 RXD2
56 RXD1
55 RXD0
54 DVDD2
53 RX_CLK
52 DGND2
51 RX_DV
50 CRS
49 COL
SUBGND2 1
TX_ER 2
DGND1 3
TX_EN 4
LNKST 5
ACTST 6
COLST 7
DVDD1 8
RXVDD3 9
RXGND3 10
FDST 11
SPDST 12
PA4 13
RESETN 14
RXVDD2 15
RXGND2 16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
MINT
DVDD3
MDC
MDIO
DGND3
RefCLK
OSCVDD
XTAL1
XTAL2
OSCGND
TXGND4
TXVDD4
TXREF100
TXREF10
TXVDD3
TXGND3
PA3 17
RXGND1 18
RXIP 19
RXIN 20
RXVDD1 21
ANEN 22
TXOP 23
TXVDD2 24
TXGND2 25
TXGND1 26
TXVDD1 27
TXON 28
PA2 29
PA1 30
PA0 31
SUBGND1 32
TP64
Figure 2Pin connections
Functional Description
The NWK933 has three basic modes of operation:
10BASE-T, 100BASE-TX and LOW POWER modes.
The Control block is designed to manage these modes
by starting and stopping the 10M and 100M transceivers
in a well-controlled manner such that no spurious
signals are output on either the MII or twisted-pair
interfaces. Furthermore, it continuously monitors the
behaviour of the transceivers and takes corrective
action if a fault is detected.
Other modes described herein are repeater mode and
reset mode.
10Base-T Operation
10Mb/s Data Transfer on the MII
10Mb/s data is transferred across the MII with clock
speeds of 2.5MHz. The MAC outputs data to the
NWK933 via the MII interface, on the TXD[3:0] bus.
This data is synchronised to the rising edge of TX_CLK.
To indicate that there is valid data for transmission on
the MII, the MAC sets the TX_EN signal active. This
forces the NWK933 device to take in the data on the
TXD[3:0] bus. This is serialised and directly encoded
as Manchester data, before being output on the TXOP/
TXON differential output for transmission through 1:Ö2
magnetics and onto the twisted-pair.
The transmit current is governed by the current through
the TXREF10 pin, which must be grounded through a
resistor as described in “External Components”.
25MHz Reference Clock
The NWK933 requires a 25MHz +/-100ppm timing
reference for 802.3 compatible operation. This may
be supplied either from the integrated oscillator or
from an external source. When the integrated oscillator
is used, a suitable crystal must be connected across
the XTAL1 & XTAL2 pins (see “External Components”)
and REFCLK must be tied low. When an external
source is used, it must be input to the REFCLK pin
and XTAL1 must be tied low. XTAL2 must be
unconnected.
RX10 Clock Recovery
The NWK933 employs a digital delay line controlled
by the 100MHz Synthesizer DLL to derive a sampling
clock from the incoming signal. The recovered clock
runs at twice the data rate (nominally 20MHz). When
a signal is received from the Signal Detect block, it is
used to strobe Link Pulses and Manchester encoded
serial data.
2
MITEL [ MITEL NETWORKS CORPORATION ]
