MV1820
Video Programme Delivery Control Interface Circuit
Supersedes version in October 1995 Media IC Handbook, HB3120 - 3.0
DS3106 - 3.0 May 1996
The MV1820 is a high speed CMOS receiver for
Programme Delivery Control (PDC) messages broadcast in
World System Teletext (WST) Format Two Broadcast
Service Data Packets (BSDP). The PDC message can be
read on an I
2
C bus with data format similar to standard Video
Programming Service (VPS) decoders. Additional data is
appended to include new PDC features.
It is intended for use in Video Cassette Recorders to
provide automatic recording of suitably labelled Television
programmes requested by the user.
8
7
6
5
4
3
2
1
9 10 11 12 13 14 15 16
8
7
6
5
4
3
2
1
DP16
FEATURES
I
I
I
I
On chip data slicing
Low external component count
I
2
C bus for low cost interfacing
Advanced CMOS technology gives low power
dissipation and high reliability
PIN
9 10 11 12 13 14 15 16
MP16
DESCRIPTION
XTI
XTO
DAV
SDA
VDD
SCL
SYNC I/O
DATA I/O
DESCRIPTION
RESET
EXT/INT
BLC
WLC
VIDEO
GND
TCR
AS
PIN
16
15
14
13
12
11
10
9
ABSOLUTE MAXIMUM RATINGS
Supply voltage
All inputs
Operating temperature
Storage temperature
0.3V to 7V
-0.3 to V
DD
+0.3V
0 to +70°C
-55 to 125°C
1
2
3
4
5
6
7
8
ORDERING INFORMATION
MV1820F/CG/DPAS
MV1820F/CG/MPES
Fig.1 Pin connections - top view
Fig.2 MV1820 block diagram