Advance Information
MT91L60/61
Applications
Figure 8 shows an application in a wireless phone
set. Figure 9 shows an MT9161B’s delayed frame
pulse driving a second MT9161B. This configuration
would be used where multiple CODEC’s were using
a data bus (an example being Mitel’s ST-BUS).
00
01
RxINC
-
RxFG
RxFG
-
RxFG
-
TxINC
TxFG
TxFG
TxFG
0
Gain Control
Register 1
2
1
0
2
1
-
-
-
STG
-
STG
-
STG
0
Gain Control
Register 2
2
1
02
03
04
-
-
-
-
-
DrGain
Path Control
PDFDI
CEN
PDDR
DEN
RST
D8
T Mute R Mute
T Bsel
R Bsel Control Register 1
x
x
x
x
A/µ
Smag/
ITU-T
CSL
CSL
CSL
0
Control Register 2
2
1
05
06
07
C
D
C
D
C
D
C
D
C
C
C
C
D
C-Channel
Register
7
6
5
4
3
2
2
1
1
0
0
D
D
D
D-Channel
Register
7
6
5
4
3
-
-
-
-
PCM/
loopen
-
-
Loop Back
ANALOG
Table 2: 3V Multi-featured Codec Register Map
Note: Bits marked "-" are reserved bits and should be written with logic "0"
11