Preliminary Information
Pin Description (continued)
Pin #
Name
24
15
28
17
Description
MT9173/74
F0o/RCK
Frame Pulse Out/Receive Bit Rate Clock
output (Digital). In DN mode a 244 ns
wide negative pulse indicating the end of the active channel times of the device to
allow daisy chaining. In MOD mode provides the receive bit rate clock to the system.
C4/TCK
Data Clock/Transmit Baud Rate Clock
(Digital). A 4.096 MHz TTL compatible clock
input for the MASTER and output for the SLAVE in DN mode. For MOD mode this pin
provides the transmit bit rate clock to the system.
Oscillator Output.
CMOS Output.
Oscillator Input.
CMOS Input. D.C. couple signals to this pin. Refer to D.C. Electrical
Characteristics for OSC1 input requirements.
Precanceller Disable.
When held to Logic ’1’
,
the internal path from L
OUT
to the
precanceller is forced to V
Bias
thus bypassing the precanceller section. When logic ’0’,
the L
OUT
to the precanceller path is enabled and functions normally. An internal
pulldown (50 kΩ) is provided on this pin.
No Connection.
Leave open circuit
16
19
17
19
20
21
22
23
OSC2
OSC1
Precan
18
1,6,
18,
20,
25
24
26
27
28
NC
21
22
23
24
L
OUT
DIS
L
OUT
Disable.
When held to logic “1”, L
OUT
is disabled (i.e., output = V
Bias
). When
logic “0”, L
OUT
functions normally. An internal pulldown (50 kΩ) is provided on this pin.
TEST
L
IN
V
DD
Test Pin.
Connect to V
SS
.
Receive Signal
input (Analog).
Positive Power Supply
(+5V) input.
9-139
MITEL [ MITEL NETWORKS CORPORATION ]
