Advance Information
15
0
MT90863
11
BBPD
0
14
0
13
BBPD
2
12
BBPD
1
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Backplane Connection Memory (BCM)
15
LBPD
3
14
LBPD
2
13
LBPD
1
12
LBPD
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Local Connection Memory Low (LCML)
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Local Connection Memory High (LCMH)
Figure 7 - Block Programming Data in the Connection Memories
A7
(Note 1)
A6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
.
1
1
A5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
.
1
1
A4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
.
1
1
0
0
.
1
1
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
.
1
1
0
0
.
1
1
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
.
1
1
0
0
.
1
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
0
.
1
1
0
0
.
1
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
.
0
1
0
1
.
0
1
Location
Control Register, CR
Device Mode Selection Register, DMS
Internal Mode Selection Register, IMS
Frame Alignment Register, FAR
Input Offset Selection Register 0, DOS0
Input Offset Selection Register 1, DOS1
Input Offset Selection Register 2, DOS2
Input Offset Selection Register 3, DOS3
Input Offset Selection Register 4, DOS4
Input Offset Selection Register 5, DOS5
Frame Output Offset Register, FOR0
Frame Output Offset Register, FOR1
Address Buffer Register, ABR
Data Write Register, DWR
Data Read Register, DRR
Ch 0
Ch 1
.
Ch 30
Ch 31
Ch 32
Ch 33
.
Ch 126
Ch 127
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
.
1
1
(
Note
2)
(
Note
3)
Notes:
1. Bit A7 must be high for access to data and connection memory positions. Bit A7 must be low for access to registers.
2. Channels 0 to 31 are used when serial stream is at 2Mb/s.
3. Channels 0 to 127 are used when serial stream is at 8Mb/s
Table 4 - Address Memory Map
11
MITEL [ MITEL NETWORKS CORPORATION ]
